From: Udit Kumar <udit.kumar@nxp.com>
To: Leif Lindholm <leif.lindholm@linaro.org>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <liming.gao@intel.com>,
Laszlo Ersek <lersek@redhat.com>,
Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Subject: Re: [PATCH] MdePkg: add big-endian MMIO BaseBeIoLib
Date: Mon, 16 Apr 2018 04:39:15 +0000 [thread overview]
Message-ID: <AM6PR0402MB3334A10FF58C07751503636391B00@AM6PR0402MB3334.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20180413174211.858-1-leif.lindholm@linaro.org>
Thanks Leif
This is really useful, We will re-spin our patches based on this
Regards
Udit
> -----Original Message-----
> From: Leif Lindholm [mailto:leif.lindholm@linaro.org]
> Sent: Friday, April 13, 2018 11:12 PM
> To: edk2-devel@lists.01.org
> Cc: Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao
> <liming.gao@intel.com>; Laszlo Ersek <lersek@redhat.com>; Udit Kumar
> <udit.kumar@nxp.com>
> Subject: [PATCH] MdePkg: add big-endian MMIO BaseBeIoLib
>
> When performing MMIO to a destination of the opposite endianness to the
> executing processor, this library provides automatic byte order reversal on
> inputs and outputs.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
>
> Udit, many apologies for this dragging out - back-to-back conferences, holidays,
> and lots of catching up.
>
> This modified version introduces a single BeIoLib instance, backed by a source-
> file that could be used also for a hypothetical LeIoLib.
> There is no LeIoLib.h included though.
I assume at present, there is no need of LeIoLib as specs itself supports LE only.
> While this is arguably overengineered, I do feel reasonably strongly that code
> should be named for what it does, not for how it is used, and doing it this way
> lets me follow that rule.
You are being too futuristic 😊
Reviewed by Udit Kumar
> I have not duplicated the .uni file together with the .inf, since this follows what
> is done in BaseIoLibIntrinsic.
>
> MdePkg/Include/Library/BeIoLib.h | 376 +++++++++++++++++++
> MdePkg/Library/BaseIoLibSwap/BaseBeIoLib.inf | 48 +++
> MdePkg/Library/BaseIoLibSwap/BaseIoLibSwap.uni | 23 ++
> MdePkg/Library/BaseIoLibSwap/IoLibSwap.c | 477
> +++++++++++++++++++++++++
> MdePkg/MdePkg.dec | 3 +
> 5 files changed, 927 insertions(+)
> create mode 100644 MdePkg/Include/Library/BeIoLib.h create mode 100644
> MdePkg/Library/BaseIoLibSwap/BaseBeIoLib.inf
> create mode 100644 MdePkg/Library/BaseIoLibSwap/BaseIoLibSwap.uni
> create mode 100644 MdePkg/Library/BaseIoLibSwap/IoLibSwap.c
>
> diff --git a/MdePkg/Include/Library/BeIoLib.h
> b/MdePkg/Include/Library/BeIoLib.h
> new file mode 100644
> index 0000000000..5b2dc1a8e1
> --- /dev/null
> +++ b/MdePkg/Include/Library/BeIoLib.h
> @@ -0,0 +1,376 @@
> +/** @file
> + Provide byte-swapping services to access MMIO registers.
> +
> +Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> +Copyright (c) 2018, Linaro ltd. All rights reserved.<BR>
> +
> +This program and the accompanying materials are licensed and made
> +available under the terms and conditions of the BSD License which
> +accompanies this distribution. The full text of the license may be
> +found at
> +https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fopens
> +ource.org%2Flicenses%2Fbsd-
> license.php&data=02%7C01%7Cudit.kumar%40nxp.
> +com%7C2f6c31eed3854caa00b408d5a165e4d7%7C686ea1d3bc2b4c6fa92cd9
> 9c5c3016
> +35%7C0%7C0%7C636592381374030897&sdata=c0FF7EKjnDdTqTMP%2BVDzjO
> BEhI5DE0F
> +jV8w5dOgIpoQ%3D&reserved=0
> +
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS
> OR IMPLIED.
> +
> +**/
> +
> +#ifndef __BE_IO_LIB_H__
> +#define __BE_IO_LIB_H__
> +
> +/**
> + Reads a 16-bit MMIO register of opposite endianness.
> +
> + Reads the 16-bit MMIO register specified by Address.
> + The 16-bit read value is returned in reversed byte order.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT16
> +EFIAPI
> +BeMmioRead16 (
> + IN UINTN Address
> + );
> +
> +/**
> + Writes a 16-bit MMIO register of opposite endianness.
> +
> + Writes the 16-bit MMIO register specified by Address with the
> + byte-reversed version of the value specified by Value and returns the original
> Value.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> + @return Value.
> +
> +**/
> +UINT16
> +EFIAPI
> +BeMmioWrite16 (
> + IN UINTN Address,
> + IN UINT16 Value
> + );
> +
> +/**
> + Reads a 16-bit MMIO register of opposite endianness, performs a
> +bitwise OR,
> + and writes the result back to the 16-bit MMIO register.
> +
> + Reads the 16-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise OR between the read result and
> + the value specified by OrData, byte-reverses the result, and writes
> + the result to the 16-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param OrData The value to OR with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +BeMmioOr16 (
> + IN UINTN Address,
> + IN UINT16 OrData
> + );
> +
> +/**
> + Reads a 16-bit MMIO register of opposite endianness, performs a
> +bitwise AND,
> + and writes the result back to the 16-bit MMIO register.
> +
> + Reads the 16-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise AND between the read result and
> + the value specified by AndData, byte-reverses the result, and writes
> + the result to the 16-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +BeMmioAnd16 (
> + IN UINTN Address,
> + IN UINT16 AndData
> + );
> +
> +/**
> + Reads a 16-bit MMIO register of opposite endianness, performs a
> +bitwise AND
> + followed by a bitwise OR, and writes the result back to the 16-bit
> +MMIO
> + register.
> +
> + Reads the 16-bit MMIO register specified by Address, byte reverses
> + the read result, performs a bitwise AND between the read result and
> + the value specified by AndData, performs a bitwise OR between the
> + result of the AND operation and the value specified by OrData,
> + byte-reverses the result, and writes the result to the 16-bit MMIO
> + register specified by Address. The pre-reversal value written to the MMIO
> register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> + @param OrData The value to OR with the result of the AND operation.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +BeMmioAndThenOr16 (
> + IN UINTN Address,
> + IN UINT16 AndData,
> + IN UINT16 OrData
> + );
> +
> +/**
> + Reads a 32-bit MMIO register of opposite endianness.
> +
> + Reads the 32-bit MMIO register specified by Address.
> + The 32-bit read value is returned in reversed byte order.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT32
> +EFIAPI
> +BeMmioRead32 (
> + IN UINTN Address
> + );
> +
> +/**
> + Writes a 32-bit MMIO register of opposite endianness.
> +
> + Writes the 32-bit MMIO register specified by Address with the
> + byte-reversed version of the value specified by Value and returns the original
> Value.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> + @return Value.
> +
> +**/
> +UINT32
> +EFIAPI
> +BeMmioWrite32 (
> + IN UINTN Address,
> + IN UINT32 Value
> + );
> +
> +/**
> + Reads a 32-bit MMIO register of opposite endianness, performs a
> +bitwise OR,
> + and writes the result back to the 32-bit MMIO register.
> +
> + Reads the 32-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise OR between the read result and
> + the value specified by OrData, byte-reverses the result, and writes
> + the result to the 32-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param OrData The value to OR with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +BeMmioOr32 (
> + IN UINTN Address,
> + IN UINT32 OrData
> + );
> +
> +/**
> + Reads a 32-bit MMIO register of opposite endianness, performs a
> +bitwise AND,
> + and writes the result back to the 32-bit MMIO register.
> +
> + Reads the 32-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise AND between the read result and
> + the value specified by AndData, byte-reverses the result, and writes
> + the result to the 32-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +BeMmioAnd32 (
> + IN UINTN Address,
> + IN UINT32 AndData
> + );
> +
> +/**
> + Reads a 32-bit MMIO register of opposite endianness, performs a
> +bitwise AND
> + followed by a bitwise OR, and writes the result back to the 32-bit
> +MMIO
> + register.
> +
> + Reads the 32-bit MMIO register specified by Address, byte reverses
> + the read value, performs a bitwise AND between the read result and
> + the value specified by AndData, performs a bitwise OR between the
> + result of the AND operation and the value specified by OrData,
> + byte-reverses the result, and writes the result to the 32-bit MMIO
> + register specified by Address. The pre-reversal value written to the MMIO
> register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> + @param OrData The value to OR with the result of the AND operation.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +BeMmioAndThenOr32 (
> + IN UINTN Address,
> + IN UINT32 AndData,
> + IN UINT32 OrData
> + );
> +
> +/**
> + Reads a 64-bit MMIO register of opposite endianness.
> +
> + Reads the 64-bit MMIO register specified by Address.
> + The 64-bit read value is returned in reversed byte order.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT64
> +EFIAPI
> +BeMmioRead64 (
> + IN UINTN Address
> + );
> +
> +/**
> + Writes a 64-bit MMIO register of opposite endianness.
> +
> + Writes the 64-bit MMIO register specified by Address with the
> + byte-reversed version of the value specified by Value and returns Value.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +BeMmioWrite64 (
> + IN UINTN Address,
> + IN UINT64 Value
> + );
> +
> +/**
> + Reads a 64-bit MMIO register of opposite endianness, performs a
> +bitwise OR,
> + and writes the result back to the 64-bit MMIO register.
> +
> + Reads the 64-bit MMIO register specified by Address, byte reverses
> + the read result, performs a bitwise OR between the read result and
> + the value specified by OrData, byte-reverses the result, and writes
> + the result to the 64-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param OrData The value to OR with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +BeMmioOr64 (
> + IN UINTN Address,
> + IN UINT64 OrData
> + );
> +
> +/**
> + Reads a 64-bit MMIO register of opposite endianness, performs a
> +bitwise AND,
> + and writes the result back to the 64-bit MMIO register.
> +
> + Reads the 64-bit MMIO register specified by Address, byte-reverses
> + the read value, performs a bitwise AND between the read result and
> + the value specified by AndData, byte-reverses the result, and writes
> + the result to the 64-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +BeMmioAnd64 (
> + IN UINTN Address,
> + IN UINT64 AndData
> + );
> +
> +/**
> + Reads a 64-bit MMIO register of opposite endianness, performs a
> +bitwise AND
> + followed by a bitwise OR, and writes the result back to the 64-bit
> +MMIO
> + register.
> +
> + Reads the 64-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise AND between the read result and
> + the value specified by AndData, performs a bitwise OR between the
> + result of the AND operation and the value specified by OrData,
> + byte-reverses the result, and writes the result to the 64-bit MMIO
> + register specified by Address. The pre-reversal value written to the MMIO
> register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> + @param OrData The value to OR with the result of the AND operation.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +BeMmioAndThenOr64 (
> + IN UINTN Address,
> + IN UINT64 AndData,
> + IN UINT64 OrData
> + );
> +
> +#endif
> diff --git a/MdePkg/Library/BaseIoLibSwap/BaseBeIoLib.inf
> b/MdePkg/Library/BaseIoLibSwap/BaseBeIoLib.inf
> new file mode 100644
> index 0000000000..fbd68b9929
> --- /dev/null
> +++ b/MdePkg/Library/BaseIoLibSwap/BaseBeIoLib.inf
> @@ -0,0 +1,48 @@
> +## @file
> +# Byte swapping I/O Library.
> +#
> +# Byte swapping I/O Library for all architectures. Only MMIO
> +supported. I/O # accesses take place through the normal IoLib, but
> +values read and written # are byte-reversed to interact with peripherals of
> non-native endianness.
> +#
> +# Copyright (c) 2007 - 2015, Intel Corporation. All rights
> +reserved.<BR> # Portions copyright (c) 2008 - 2009, Apple Inc. All
> +rights reserved.<BR> # Copyright (c) 2017, AMD Incorporated. All
> +rights reserved.<BR> # # This program and the accompanying materials #
> +are licensed and made available under the terms and conditions of the
> +BSD License # which accompanies this distribution. The full text of
> +the license may be found at #
> https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fopenso
> urce.org%2Flicenses%2Fbsd-
> license.php&data=02%7C01%7Cudit.kumar%40nxp.com%7C2f6c31eed3854caa
> 00b408d5a165e4d7%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
> 6592381374030897&sdata=c0FF7EKjnDdTqTMP%2BVDzjOBEhI5DE0FjV8w5dOgI
> poQ%3D&reserved=0.
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> +BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x0001001a
> + BASE_NAME = BaseBeIoLib
> + MODULE_UNI_FILE = BaseIoLibSwap.uni
> + FILE_GUID = 073c3fbd-ff0d-41b6-a209-1e42fd2a3bab
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = BeIoLib
> +
> +
> +#
> +# VALID_ARCHITECTURES = IA32 X64 EBC IPF ARM AARCH64
> +#
> +
> +[Sources]
> + IoLibSwap.c
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> +
> +[LibraryClasses]
> + BaseLib
> + IoLib
> +
> +[BuildOptions]
> + GCC:*_*_*_CC_FLAGS = -D FUNCTION_PREFIX=Be
> + INTEL:*_*_*_CC_FLAGS = /D FUNCTION_PREFIX=Be
> + MSFT:*_*_*_CC_FLAGS = /D FUNCTION_PREFIX=Be
> diff --git a/MdePkg/Library/BaseIoLibSwap/BaseIoLibSwap.uni
> b/MdePkg/Library/BaseIoLibSwap/BaseIoLibSwap.uni
> new file mode 100644
> index 0000000000..e35b4abef7
> --- /dev/null
> +++ b/MdePkg/Library/BaseIoLibSwap/BaseIoLibSwap.uni
> @@ -0,0 +1,23 @@
> +// /** @file
> +// Byte swapping I/O Library.
> +//
> +// Byte swapping I/O Library for all architectures. Only MMIO
> +supported. I/O // accesses take place through the normal IoLib, but
> +values read and written // are byte-reversed to interact with peripherals of
> non-native endianness.
> +//
> +// Copyright (c) 2018, Linaro ltd. All rights reserved.<BR> // // This
> +program and the accompanying materials // are licensed and made
> +available under the terms and conditions of the BSD License // which
> +accompanies this distribution. The full text of the license may be
> +found at //
> https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fopenso
> urce.org%2Flicenses%2Fbsd-
> license.php&data=02%7C01%7Cudit.kumar%40nxp.com%7C2f6c31eed3854caa
> 00b408d5a165e4d7%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
> 6592381374030897&sdata=c0FF7EKjnDdTqTMP%2BVDzjOBEhI5DE0FjV8w5dOgI
> poQ%3D&reserved=0.
> +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> +BASIS, // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +//
> +// **/
> +
> +
> +#string STR_MODULE_ABSTRACT #language en-US "Byte swapping I/O
> Library"
> +
> +#string STR_MODULE_DESCRIPTION #language en-US "Byte swapping I/O
> Library for all architectures. Only MMIO supported. I/O accesses take place
> through the normal IoLib, but values read and written are byte-reversed to
> interact with peripherals of non-native endianness."
> +
> diff --git a/MdePkg/Library/BaseIoLibSwap/IoLibSwap.c
> b/MdePkg/Library/BaseIoLibSwap/IoLibSwap.c
> new file mode 100644
> index 0000000000..f4f49f72d2
> --- /dev/null
> +++ b/MdePkg/Library/BaseIoLibSwap/IoLibSwap.c
> @@ -0,0 +1,477 @@
> +/** @file
> + Provide byte-swapping services to access MMIO registers.
> +
> +Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> +Copyright (c) 2018, Linaro ltd. All rights reserved.<BR>
> +
> +This program and the accompanying materials are licensed and made
> +available under the terms and conditions of the BSD License which
> +accompanies this distribution. The full text of the license may be
> +found at
> +https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fopens
> +ource.org%2Flicenses%2Fbsd-
> license.php&data=02%7C01%7Cudit.kumar%40nxp.
> +com%7C2f6c31eed3854caa00b408d5a165e4d7%7C686ea1d3bc2b4c6fa92cd9
> 9c5c3016
> +35%7C0%7C0%7C636592381374030897&sdata=c0FF7EKjnDdTqTMP%2BVDzjO
> BEhI5DE0F
> +jV8w5dOgIpoQ%3D&reserved=0
> +
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS
> OR IMPLIED.
> +
> +**/
> +
> +#include <Library/BaseLib.h>
> +#include <Library/IoLib.h>
> +
> +#define __CONCATENATE(a, b) a ## b
> +#define _CONCATENATE(a, b) __CONCATENATE(a, b) #define
> ADD_PREFIX(name)
> +_CONCATENATE (FUNCTION_PREFIX, name)
> +
> +/**
> + Reads a 16-bit MMIO register of opposite endianness.
> +
> + Reads the 16-bit MMIO register specified by Address.
> + The 16-bit read value is returned in reversed byte order.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT16
> +EFIAPI
> +ADD_PREFIX (MmioRead16) (
> + IN UINTN Address
> + )
> +{
> + return SwapBytes16 (MmioRead16 (Address)); }
> +
> +/**
> + Writes a 16-bit MMIO register of opposite endianness.
> +
> + Writes the 16-bit MMIO register specified by Address with the
> + byte-reversed version of the value specified by Value and returns the original
> Value.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> + @return Value.
> +
> +**/
> +UINT16
> +EFIAPI
> +ADD_PREFIX (MmioWrite16) (
> + IN UINTN Address,
> + IN UINT16 Value
> + )
> +{
> + (VOID) MmioWrite16 (Address, SwapBytes16 (Value));
> +
> + return Value;
> +}
> +
> +/**
> + Reads a 16-bit MMIO register of opposite endianness, performs a
> +bitwise OR,
> + and writes the result back to the 16-bit MMIO register.
> +
> + Reads the 16-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise OR between the read result and
> + the value specified by OrData, byte-reverses the result, and writes
> + the result to the 16-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param OrData The value to OR with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +ADD_PREFIX (MmioOr16) (
> + IN UINTN Address,
> + IN UINT16 OrData
> + )
> +{
> + UINT16 Value;
> +
> + Value = ADD_PREFIX (MmioRead16) (Address); Value |= OrData;
> +
> + return ADD_PREFIX (MmioWrite16) (Address, Value); }
> +
> +/**
> + Reads a 16-bit MMIO register of opposite endianness, performs a
> +bitwise AND,
> + and writes the result back to the 16-bit MMIO register.
> +
> + Reads the 16-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise AND between the read result and
> + the value specified by AndData, byte-reverses the result, and writes
> + the result to the 16-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +ADD_PREFIX (MmioAnd16) (
> + IN UINTN Address,
> + IN UINT16 AndData
> + )
> +{
> + UINT16 Value;
> +
> + Value = ADD_PREFIX (MmioRead16) (Address); Value &= AndData;
> +
> + return ADD_PREFIX (MmioWrite16) (Address, Value); }
> +
> +/**
> + Reads a 16-bit MMIO register of opposite endianness, performs a
> +bitwise AND
> + followed by a bitwise OR, and writes the result back to the 16-bit
> +MMIO
> + register.
> +
> + Reads the 16-bit MMIO register specified by Address, byte reverses
> + the read result, performs a bitwise AND between the read result and
> + the value specified by AndData, performs a bitwise OR between the
> + result of the AND operation and the value specified by OrData,
> + byte-reverses the result, and writes the result to the 16-bit MMIO
> + register specified by Address. The pre-reversal value written to the MMIO
> register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> + @param OrData The value to OR with the result of the AND operation.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT16
> +EFIAPI
> +ADD_PREFIX (MmioAndThenOr16) (
> + IN UINTN Address,
> + IN UINT16 AndData,
> + IN UINT16 OrData
> + )
> +{
> + UINT16 Value;
> +
> + Value = ADD_PREFIX (MmioRead16) (Address); Value &= AndData; Value
> + |= OrData;
> +
> + return ADD_PREFIX (MmioWrite16) (Address, Value); }
> +
> +/**
> + Reads a 32-bit MMIO register of opposite endianness.
> +
> + Reads the 32-bit MMIO register specified by Address.
> + The 32-bit read value is returned in reversed byte order.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT32
> +EFIAPI
> +ADD_PREFIX (MmioRead32) (
> + IN UINTN Address
> + )
> +{
> + return SwapBytes32 (MmioRead32 (Address)); }
> +
> +/**
> + Writes a 32-bit MMIO register of opposite endianness.
> +
> + Writes the 32-bit MMIO register specified by Address with the
> + byte-reversed version of the value specified by Value and returns the original
> Value.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> + @return Value.
> +
> +**/
> +UINT32
> +EFIAPI
> +ADD_PREFIX (MmioWrite32) (
> + IN UINTN Address,
> + IN UINT32 Value
> + )
> +{
> + (VOID) MmioWrite32 (Address, SwapBytes32 (Value));
> +
> + return Value;
> +}
> +
> +/**
> + Reads a 32-bit MMIO register of opposite endianness, performs a
> +bitwise OR,
> + and writes the result back to the 32-bit MMIO register.
> +
> + Reads the 32-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise OR between the read result and
> + the value specified by OrData, byte-reverses the result, and writes
> + the result to the 32-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param OrData The value to OR with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +ADD_PREFIX (MmioOr32) (
> + IN UINTN Address,
> + IN UINT32 OrData
> + )
> +{
> + UINT32 Value;
> +
> + Value = ADD_PREFIX (MmioRead32) (Address); Value |= OrData;
> +
> + return ADD_PREFIX (MmioWrite32) (Address, Value); }
> +
> +/**
> + Reads a 32-bit MMIO register of opposite endianness, performs a
> +bitwise AND,
> + and writes the result back to the 32-bit MMIO register.
> +
> + Reads the 32-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise AND between the read result and
> + the value specified by AndData, byte-reverses the result, and writes
> + the result to the 32-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +ADD_PREFIX (MmioAnd32) (
> + IN UINTN Address,
> + IN UINT32 AndData
> + )
> +{
> + UINT32 Value;
> +
> + Value = ADD_PREFIX (MmioRead32) (Address); Value &= AndData;
> +
> + return ADD_PREFIX (MmioWrite32) (Address, Value); }
> +
> +/**
> + Reads a 32-bit MMIO register of opposite endianness, performs a
> +bitwise AND
> + followed by a bitwise OR, and writes the result back to the 32-bit
> +MMIO
> + register.
> +
> + Reads the 32-bit MMIO register specified by Address, byte reverses
> + the read value, performs a bitwise AND between the read result and
> + the value specified by AndData, performs a bitwise OR between the
> + result of the AND operation and the value specified by OrData,
> + byte-reverses the result, and writes the result to the 32-bit MMIO
> + register specified by Address. The pre-reversal value written to the MMIO
> register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> + @param OrData The value to OR with the result of the AND operation.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT32
> +EFIAPI
> +ADD_PREFIX (MmioAndThenOr32) (
> + IN UINTN Address,
> + IN UINT32 AndData,
> + IN UINT32 OrData
> + )
> +{
> + UINT32 Value;
> +
> + Value = ADD_PREFIX (MmioRead32) (Address); Value &= AndData; Value
> + |= OrData;
> +
> + return ADD_PREFIX (MmioWrite32) (Address, Value); }
> +
> +/**
> + Reads a 64-bit MMIO register of opposite endianness.
> +
> + Reads the 64-bit MMIO register specified by Address.
> + The 64-bit read value is returned in reversed byte order.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to read.
> +
> + @return The value read.
> +
> +**/
> +UINT64
> +EFIAPI
> +ADD_PREFIX (MmioRead64) (
> + IN UINTN Address
> + )
> +{
> + return SwapBytes64 (MmioRead64 (Address)); }
> +
> +/**
> + Writes a 64-bit MMIO register of opposite endianness.
> +
> + Writes the 64-bit MMIO register specified by Address with the
> + byte-reversed version of the value specified by Value and returns Value.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param Value The value to write to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +ADD_PREFIX (MmioWrite64) (
> + IN UINTN Address,
> + IN UINT64 Value
> + )
> +{
> + (VOID) MmioWrite64 (Address, SwapBytes64 (Value));
> +
> + return Value;
> +}
> +
> +/**
> + Reads a 64-bit MMIO register of opposite endianness, performs a
> +bitwise OR,
> + and writes the result back to the 64-bit MMIO register.
> +
> + Reads the 64-bit MMIO register specified by Address, byte reverses
> + the read result, performs a bitwise OR between the read result and
> + the value specified by OrData, byte-reverses the result, and writes
> + the result to the 64-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param OrData The value to OR with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +ADD_PREFIX (MmioOr64) (
> + IN UINTN Address,
> + IN UINT64 OrData
> + )
> +{
> + UINT64 Value;
> +
> + Value = ADD_PREFIX (MmioRead64) (Address); Value |= OrData;
> +
> + return ADD_PREFIX (MmioWrite64) (Address, Value); }
> +
> +/**
> + Reads a 64-bit MMIO register of opposite endianness, performs a
> +bitwise AND,
> + and writes the result back to the 64-bit MMIO register.
> +
> + Reads the 64-bit MMIO register specified by Address, byte-reverses
> + the read value, performs a bitwise AND between the read result and
> + the value specified by AndData, byte-reverses the result, and writes
> + the result to the 64-bit MMIO register specified by Address. The
> + pre-reversal value written to the MMIO register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +ADD_PREFIX (MmioAnd64) (
> + IN UINTN Address,
> + IN UINT64 AndData
> + )
> +{
> + UINT64 Value;
> +
> + Value = ADD_PREFIX (MmioRead64) (Address); Value &= AndData;
> +
> + return ADD_PREFIX (MmioWrite64) (Address, Value); }
> +
> +/**
> + Reads a 64-bit MMIO register of opposite endianness, performs a
> +bitwise AND
> + followed by a bitwise OR, and writes the result back to the 64-bit
> +MMIO
> + register.
> +
> + Reads the 64-bit MMIO register specified by Address, byte-reverses
> + the read result, performs a bitwise AND between the read result and
> + the value specified by AndData, performs a bitwise OR between the
> + result of the AND operation and the value specified by OrData,
> + byte-reverses the result, and writes the result to the 64-bit MMIO
> + register specified by Address. The pre-reversal value written to the MMIO
> register is returned.
> + This function must guarantee that all MMIO read and write operations
> + are serialized.
> +
> + @param Address The MMIO register to write.
> + @param AndData The value to AND with the read value from the MMIO
> register.
> + @param OrData The value to OR with the result of the AND operation.
> +
> + @return The value written back to the MMIO register.
> +
> +**/
> +UINT64
> +EFIAPI
> +ADD_PREFIX (MmioAndThenOr64) (
> + IN UINTN Address,
> + IN UINT64 AndData,
> + IN UINT64 OrData
> + )
> +{
> + UINT64 Value;
> +
> + Value = ADD_PREFIX (MmioRead64) (Address); Value &= AndData; Value
> + |= OrData;
> +
> + return ADD_PREFIX (MmioWrite64) (Address, Value); }
> diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index
> 0e64f22f4a..ae7c8dfa11 100644
> --- a/MdePkg/MdePkg.dec
> +++ b/MdePkg/MdePkg.dec
> @@ -160,6 +160,9 @@ [LibraryClasses]
> ## @libraryclass Provide services to access I/O Ports and MMIO registers.
> IoLib|Include/Library/IoLib.h
>
> + ## @libraryclass Provide big-endian services to access MMIO registers.
> + BeIoLib|Include/Library/BeIoLib.h
> +
> ## @libraryclass Provide services to create, get and update HSTI table in AIP
> protocol.
> HstiLib|Include/Library/HstiLib.h
>
> --
> 2.11.0
prev parent reply other threads:[~2018-04-16 4:39 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-13 17:42 [PATCH] MdePkg: add big-endian MMIO BaseBeIoLib Leif Lindholm
2018-04-13 19:24 ` Kinney, Michael D
2018-04-13 19:31 ` Leif Lindholm
2018-04-13 23:32 ` Kinney, Michael D
2018-04-16 10:07 ` Leif Lindholm
2018-04-16 14:10 ` Kinney, Michael D
2018-04-16 14:34 ` Michael Brown
2018-04-16 20:42 ` Laszlo Ersek
2018-04-16 22:14 ` Michael Brown
2018-04-17 8:01 ` Laszlo Ersek
2018-04-17 8:24 ` Michael Brown
2018-04-17 9:57 ` Laszlo Ersek
2018-04-17 13:26 ` Leif Lindholm
2018-04-17 15:20 ` Kinney, Michael D
2018-04-17 6:57 ` Udit Kumar
2018-04-16 19:32 ` Laszlo Ersek
2018-04-17 8:15 ` Udit Kumar
2018-04-17 9:42 ` Laszlo Ersek
2018-04-17 10:32 ` Udit Kumar
2018-04-17 13:55 ` (spawning off more style discussion) Leif Lindholm
2018-04-18 8:51 ` Laszlo Ersek
2018-04-16 4:39 ` Udit Kumar [this message]
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