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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jul 2020 16:21:34.3475 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a293e364-83f2-43b3-f2fb-08d8317ff6c4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT015.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5103 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Leif, > -----Original Message----- > From: Leif Lindholm > Sent: Friday, July 24, 2020 10:59 PM > To: Pranav Madhu > Cc: devel@edk2.groups.io; Ard Biesheuvel > Subject: Re: [edk2-platforms][PATCH v5 1/5] Silicon/ARM/N1SoC: Add > platform library implementation > > On Wed, Jul 22, 2020 at 20:55:20 +0530, Pranav Madhu wrote: > > From: Deepak Pandey > > > > Add the initial Arm's Neoverse N1 System-on-Chip platform library > > support. This includes the virtual memory map and helper functions for > > platform initialization. > > > > Cc: Ard Biesheuvel > > Cc: Leif Lindholm > > Signed-off-by: Pranav Madhu > > --- > > Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 27 += ++++ > > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf | 43 > +++++++ > > Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 66 > +++++++++++ > > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c | 67 > +++++++++++ > > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 125 > > ++++++++++++++++++++ > > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S | 84 > > +++++++++++++ > > 6 files changed, 412 insertions(+) <...> > > +// Base address to a structure of type NEOVERSEN1SOC_PLAT_INFO > which > > +is // pre-populated by a earlier boot stage > > +#define NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE > (NEOVERSEN1SOC_NON_SECURE_SRAM_BASE + \ > > + 0x00008000) > > + > > +/* > > + * Platform information structure stored in non-secure SRAM. Platform > > The architectural terms as Secure an Non-secure. I asked for the latter. = I will > fix this up before pushing, but please pay attention to case for architec= tural > terminology. > > Other than this, the patch is fine, so: > Reviewed-by: Leif Lindholm Thanks for fixing this up and your review of the patches. I'll take care of= the case for architectural terminology henceforth. Regards, Pranav <...> IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you.