Re: [edk2-devel] [PATCH v7 0/6] Enable CCIX port as PCIe root host on N1SDP

["Sami Mujawar" <sami.mujawar@arm.com>]

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Merged as 805059812997..239181acdd45

Regards,

Sami Mujawar

From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Sami Mujawar via groups.io <sami.mujawar=arm.com@groups.io>
Date: Monday, 24 January 2022 at 18:16
To: Khasim Mohammed <Khasim.Mohammed@arm.com>, devel@edk2.groups.io <devel@edk2.groups.io>
Cc: nd <nd@arm.com>, Pierre Gondois <Pierre.Gondois@arm.com>, Khasim Mohammed <Khasim.Mohammed@arm.com>
Subject: Re: [edk2-devel] [PATCH v7 0/6] Enable CCIX port as PCIe root host on N1SDP
Hi Khasim,

Thank you for splitting the patches.

For this series,

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

From: Khasim Mohammed <Khasim.Mohammed@arm.com>
Date: Monday, 24 January 2022 at 15:56
To: devel@edk2.groups.io <devel@edk2.groups.io>
Cc: nd <nd@arm.com>, Sami Mujawar <Sami.Mujawar@arm.com>, Pierre Gondois <Pierre.Gondois@arm.com>, Khasim Mohammed <Khasim.Mohammed@arm.com>
Subject: [PATCH v7 0/6] Enable CCIX port as PCIe root host on N1SDP
The patch series removes PciExpressLib and enables CCIX port
as PCIe root on N1SDP.

V7:
- Spit the patches to separate Platform and Silicon specific files

V6:
- Sort PCDs in alphabetical order
- Replace ASSERT calls with a if condition to capture the failure

V5:
- Split the CCIX patch, separate PCD updates and CCIX root port enablement.
- Use GET_SEG_ macro for segment detection and update logic accordingly.

V4:
- Remove PciExpressLib and use PciSegmentLib instead. More detailed explanation
  is included in the patch.

V3:
- The conditional logic in GetPciExpressAddress is made simple.
- Removed few more PCD entries that were unused.
- Removed hardcoded entries.

V2:
- Removed few PCDs entries that were not used.
- Migrated to latest version edk2-platform and validated the patches.

V1:
-  The PciExpressLib is updated to validate the PCIe addresses
  and introducing corresponding PCD entries.
- A custom PCI Segment library is adapted from SynQuacerPciSegmentLib
  and ported for N1Sdp.
- The root complex node info in PciHostBridge library is updated to
  include the CCIX port information.

The changes can be seen at:
https://github.com/khasim/edk2-platforms-n1sdp/tree/n1sdp-ccix-root


Khasim Syed Mohammed (6):
  Silicon/ARM/NeoverseN1Soc: Port PCI Segment Library
  Silicon/ARM/NeoverseN1Soc: Update PCDs to support multiple PCI root
    ports
  Platform/ARM/N1Sdp: Update PCDs to support multiple PCI root ports
  Silicon/ARM/NeoverseN1Soc: Add CCIX root complex support
  Silicon/ARM/NeoverseN1Soc: Remove PciExpressLib use PciSegmentLib
    instead
  Platform/ARM/N1Sdp: Remove PciExpressLib use PciSegmentLib instead

 .../AslTables/SsdtPci.asl                     |    8 +-
 .../AslTables/SsdtRemotePci.asl               |    4 +-
 .../ConfigurationManager.c                    |   24 +-
 .../ConfigurationManagerDxe.inf               |   18 +-
 Platform/ARM/N1Sdp/N1SdpPlatform.dec          |    8 -
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc          |    5 +-
 .../PciExpressLib.c                           | 1589 ----------------
 .../PciExpressLib.inf                         |   56 -
 .../PciHostBridgeLib/PciHostBridgeLib.c       |   71 +-
 .../PciHostBridgeLib/PciHostBridgeLib.inf     |   11 +-
 .../Library/PciSegmentLib/PciSegmentLib.c     | 1622 +++++++++++++++++
 .../Library/PciSegmentLib/PciSegmentLib.inf   |   38 +
 .../Library/PlatformLib/PlatformLib.inf       |    1 +
 .../Library/PlatformLib/PlatformLibMem.c      |    4 +-
 Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec   |   64 +-
 15 files changed, 1808 insertions(+), 1715 deletions(-)
 delete mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.c
 delete mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.inf
 create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciSegmentLib/PciSegmentLib.c
 create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciSegmentLib/PciSegmentLib.inf

--
2.17.1


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