From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 194D72195407C for ; Sun, 23 Apr 2017 18:07:52 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Apr 2017 18:07:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,242,1488873600"; d="scan'208";a="1139253962" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga001.fm.intel.com with ESMTP; 23 Apr 2017 18:07:50 -0700 Received: from fmsmsx126.amr.corp.intel.com (10.18.125.43) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 23 Apr 2017 18:07:50 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX126.amr.corp.intel.com (10.18.125.43) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 23 Apr 2017 18:07:50 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.178]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.217]) with mapi id 14.03.0319.002; Mon, 24 Apr 2017 09:07:48 +0800 From: "Wu, Hao A" To: Suman Prakash , "edk2-devel@lists.01.org" CC: "Tian, Feng" Thread-Topic: [edk2] [PATCH] MdeModulePkg/NvmExpressDxe: Handling return of write to sq and cq db Thread-Index: AQHSub1OqpI1RdZIoE6VV4unKm6AI6HPDGHggASuYrA= Date: Mon, 24 Apr 2017 01:07:47 +0000 Message-ID: References: In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg/NvmExpressDxe: Handling return of write to sq and cq db X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 24 Apr 2017 01:07:52 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Wu= , > Hao A > Sent: Friday, April 21, 2017 9:39 AM > To: Suman Prakash; edk2-devel@lists.01.org > Cc: Tian, Feng > Subject: Re: [edk2] [PATCH] MdeModulePkg/NvmExpressDxe: Handling return > of write to sq and cq db >=20 > Thanks for the catch. The patch is good to me. > Reviewed-by: Hao Wu >=20 Pushed at f6b139bde7e0a39f83ffad30af58136d5b0738a7. >=20 > Best Regards, > Hao Wu >=20 >=20 > > -----Original Message----- > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > > Suman Prakash > > Sent: Thursday, April 20, 2017 6:02 PM > > To: edk2-devel@lists.01.org > > Cc: Tian, Feng > > Subject: [edk2] [PATCH] MdeModulePkg/NvmExpressDxe: Handling return of > > write to sq and cq db > > > > In case of an async command if updating the submission queue tail > > doorbell fails then the command will not be picked up by device and > > no completion response will be created. This scenario has to be handled= . > > Also if we create an AsyncRequest element and insert in the async queue= , > > it will never receive a completion so in the timer routine this element > > won't be freed, resulting in memory leak. Also in case of blocking call= s > > we should capture the status of updating completion queue head doorbell > > register and return it to caller of PassThru. > > > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Suman Prakash > > --- > > MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 8 ++++++-- > > 1 file changed, 6 insertions(+), 2 deletions(-) > > > > diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > > b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > > index ef3d772..fb80f39 100644 > > --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > > +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > > @@ -603,7 +603,7 @@ NvmExpressPassThru ( > > Private->SqTdbl[QueueId].Sqt ^=3D 1; > > } > > Data =3D ReadUnaligned32 ((UINT32*)&Private->SqTdbl[QueueId]); > > - PciIo->Mem.Write ( > > + Status =3D PciIo->Mem.Write ( > > PciIo, > > EfiPciIoWidthUint32, > > NVME_BAR, > > @@ -612,6 +612,10 @@ NvmExpressPassThru ( > > &Data > > ); > > > > + if (EFI_ERROR (Status)) { > > + goto EXIT; > > + } > > + > > // > > // For non-blocking requests, return directly if the command is plac= ed > > // in the submission queue. > > @@ -695,7 +699,7 @@ NvmExpressPassThru ( > > } > > > > Data =3D ReadUnaligned32 ((UINT32*)&Private->CqHdbl[QueueId]); > > - PciIo->Mem.Write ( > > + Status =3D PciIo->Mem.Write ( > > PciIo, > > EfiPciIoWidthUint32, > > NVME_BAR, > > -- > > 1.9.1 > > > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel