From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C91AF21AE3CAE for ; Tue, 30 May 2017 21:15:15 -0700 (PDT) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 May 2017 21:16:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,421,1491289200"; d="scan'208";a="107335066" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga005.jf.intel.com with ESMTP; 30 May 2017 21:16:15 -0700 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 30 May 2017 21:16:14 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX152.amr.corp.intel.com (10.18.125.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 30 May 2017 21:16:14 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.151]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.197]) with mapi id 14.03.0319.002; Wed, 31 May 2017 12:16:12 +0800 From: "Wu, Hao A" To: "Zeng, Star" , "edk2-devel@lists.01.org" CC: Baranee Thread-Topic: [edk2] [PATCH] MdeModulePkg/Xhci: Fill the 'interval' field for ISO endpoint context Thread-Index: AQHS2a/7Vsg2u1ta9ESYN992FgbuWKINQggAgACTmnA= Date: Wed, 31 May 2017 04:16:11 +0000 Message-ID: References: <20170531014803.18280-1-hao.a.wu@intel.com> <0C09AFA07DD0434D9E2A0C6AEB0483103B8DB2D5@shsmsx102.ccr.corp.intel.com> In-Reply-To: <0C09AFA07DD0434D9E2A0C6AEB0483103B8DB2D5@shsmsx102.ccr.corp.intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg/Xhci: Fill the 'interval' field for ISO endpoint context X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 May 2017 04:15:16 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Zeng, Star > Sent: Wednesday, May 31, 2017 11:27 AM > To: Wu, Hao A; edk2-devel@lists.01.org > Cc: Wu, Hao A; Baranee; Zeng, Star > Subject: RE: [edk2] [PATCH] MdeModulePkg/Xhci: Fill the 'interval' field = for ISO > endpoint context >=20 > Reviewed-by: Star Zeng >=20 > BTW: Could you add the reference to the bugzilla link in the commit log? Yes, I will modify the commit message to include the info. Best Regards, Hao Wu >=20 >=20 > Thanks, > Star > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ha= o > Wu > Sent: Wednesday, May 31, 2017 9:48 AM > To: edk2-devel@lists.01.org > Cc: Wu, Hao A ; Baranee ; Zeng, > Star > Subject: [edk2] [PATCH] MdeModulePkg/Xhci: Fill the 'interval' field for = ISO > endpoint context >=20 > The commit fills the 'Interval' field of the Endpoint Context data for is= ochronous > endpoints. It will resolve the error when a Configure Endpoint Command is= sent > to an isochronous endpoint. >=20 > Cc: Star Zeng > Cc: Baranee > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Hao Wu > --- > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 30 > +++++++++++++++++++++++++++++- > MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c | 30 > +++++++++++++++++++++++++++++- > 2 files changed, 58 insertions(+), 2 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > index 4bec76a85f..58a2f984a9 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > @@ -2,7 +2,7 @@ >=20 > XHCI transfer scheduling routines. >=20 > -Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
> +Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
> This program and the accompanying materials are licensed and made > available under the terms and conditions of the BSD License which > accompanies this distribution. The full text of the license may be found= at @@ > -2661,6 +2661,20 @@ XhcInitializeEndpointContext ( > InputContext->EP[Dci-1].EPType =3D ED_ISOCH_OUT; > } > // > + // Get the bInterval from descriptor and init the the interval f= ield of > endpoint context. > + // Refer to XHCI 1.1 spec section 6.2.3.6. > + // > + if (DeviceSpeed =3D=3D EFI_USB_SPEED_FULL) { > + Interval =3D EpDesc->Interval; > + ASSERT (Interval >=3D 1 && Interval <=3D 16); > + InputContext->EP[Dci-1].Interval =3D Interval + 2; > + } else if ((DeviceSpeed =3D=3D EFI_USB_SPEED_HIGH) || (DeviceSpe= ed =3D=3D > EFI_USB_SPEED_SUPER)) { > + Interval =3D EpDesc->Interval; > + ASSERT (Interval >=3D 1 && Interval <=3D 16); > + InputContext->EP[Dci-1].Interval =3D Interval - 1; > + } > + > + // > // Do not support isochronous transfer now. > // > DEBUG ((EFI_D_INFO, "XhcInitializeEndpointContext: Unsupport ISO= EP > found, Transfer ring is not allocated.\n")); @@ -2829,6 +2843,20 @@ > XhcInitializeEndpointContext64 ( > InputContext->EP[Dci-1].EPType =3D ED_ISOCH_OUT; > } > // > + // Get the bInterval from descriptor and init the the interval f= ield of > endpoint context. > + // Refer to XHCI 1.1 spec section 6.2.3.6. > + // > + if (DeviceSpeed =3D=3D EFI_USB_SPEED_FULL) { > + Interval =3D EpDesc->Interval; > + ASSERT (Interval >=3D 1 && Interval <=3D 16); > + InputContext->EP[Dci-1].Interval =3D Interval + 2; > + } else if ((DeviceSpeed =3D=3D EFI_USB_SPEED_HIGH) || (DeviceSpe= ed =3D=3D > EFI_USB_SPEED_SUPER)) { > + Interval =3D EpDesc->Interval; > + ASSERT (Interval >=3D 1 && Interval <=3D 16); > + InputContext->EP[Dci-1].Interval =3D Interval - 1; > + } > + > + // > // Do not support isochronous transfer now. > // > DEBUG ((EFI_D_INFO, "XhcInitializeEndpointContext64: Unsupport I= SO EP > found, Transfer ring is not allocated.\n")); diff --git > a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c > b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c > index 7a63dabd8c..3dd2b89097 100644 > --- a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c > +++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c > @@ -2,7 +2,7 @@ > PEIM to produce gPeiUsb2HostControllerPpiGuid based on > gPeiUsbControllerPpiGuid which is used to enable recovery function from = USB > Drivers. >=20 > -Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
> +Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
>=20 > This program and the accompanying materials are licensed and made > available under the terms and conditions @@ -1750,6 +1750,20 @@ > XhcPeiSetConfigCmd ( > InputContext->EP[Dci-1].EPType =3D ED_ISOCH_OUT; > } > // > + // Get the bInterval from descriptor and init the the interval= field of > endpoint context. > + // Refer to XHCI 1.1 spec section 6.2.3.6. > + // > + if (DeviceSpeed =3D=3D EFI_USB_SPEED_FULL) { > + Interval =3D EpDesc->Interval; > + ASSERT (Interval >=3D 1 && Interval <=3D 16); > + InputContext->EP[Dci-1].Interval =3D Interval + 2; > + } else if ((DeviceSpeed =3D=3D EFI_USB_SPEED_HIGH) || (DeviceS= peed =3D=3D > EFI_USB_SPEED_SUPER)) { > + Interval =3D EpDesc->Interval; > + ASSERT (Interval >=3D 1 && Interval <=3D 16); > + InputContext->EP[Dci-1].Interval =3D Interval - 1; > + } > + > + // > // Do not support isochronous transfer now. > // > DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd: Unsupport ISO EP foun= d, > Transfer ring is not allocated.\n")); @@ -1953,6 +1967,20 @@ > XhcPeiSetConfigCmd64 ( > InputContext->EP[Dci-1].EPType =3D ED_ISOCH_OUT; > } > // > + // Get the bInterval from descriptor and init the the interval= field of > endpoint context. > + // Refer to XHCI 1.1 spec section 6.2.3.6. > + // > + if (DeviceSpeed =3D=3D EFI_USB_SPEED_FULL) { > + Interval =3D EpDesc->Interval; > + ASSERT (Interval >=3D 1 && Interval <=3D 16); > + InputContext->EP[Dci-1].Interval =3D Interval + 2; > + } else if ((DeviceSpeed =3D=3D EFI_USB_SPEED_HIGH) || (DeviceS= peed =3D=3D > EFI_USB_SPEED_SUPER)) { > + Interval =3D EpDesc->Interval; > + ASSERT (Interval >=3D 1 && Interval <=3D 16); > + InputContext->EP[Dci-1].Interval =3D Interval - 1; > + } > + > + // > // Do not support isochronous transfer now. > // > DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd64: Unsupport ISO EP fo= und, > Transfer ring is not allocated.\n")); > -- > 2.12.0.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel