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Thu, 29 Jun 2017 01:44:57 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.151]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.197]) with mapi id 14.03.0319.002; Thu, 29 Jun 2017 16:44:54 +0800 From: "Wu, Hao A" To: "Ni, Ruiyu" , "edk2-devel@lists.01.org" CC: "Tian, Feng" , "Zeng, Star" Thread-Topic: [edk2] [PATCH 2/3] MdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring information Thread-Index: AQHS7/r4913QgDZYakmyglqekaplF6I7h+qw Date: Thu, 29 Jun 2017 08:44:54 +0000 Message-ID: References: <20170628103959.397244-1-ruiyu.ni@intel.com> <20170628103959.397244-3-ruiyu.ni@intel.com> In-Reply-To: <20170628103959.397244-3-ruiyu.ni@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 2/3] MdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring information X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Jun 2017 08:43:26 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Hao Wu Best Regards, Hao Wu > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ru= iyu > Ni > Sent: Wednesday, June 28, 2017 6:40 PM > To: edk2-devel@lists.01.org > Cc: Wu, Hao A; Tian, Feng; Zeng, Star > Subject: [edk2] [PATCH 2/3] MdeModulePkg/XhciDxe: Dump the > CMD/EVENT/INT/BULK ring information >=20 > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ruiyu Ni > Cc: Hao A Wu > Cc: Star Zeng > Cc: Feng Tian > --- > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 27 > ++++++++++++++++++++++++--- > 1 file changed, 24 insertions(+), 3 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > index 93803c352e..dbc91023e1 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > @@ -604,8 +604,6 @@ XhcInitSched ( > XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET, XHC_LOW_32BIT(CmdRingPhy)); > XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET + 4, XHC_HIGH_32BIT > (CmdRingPhy)); >=20 > - DEBUG ((EFI_D_INFO, "XhcInitSched:XHC_CRCR=3D0x%x\n", Xhc- > >CmdRing.RingSeg0)); > - > // > // Disable the 'interrupter enable' bit in USB_CMD > // and clear IE & IP bit in all Interrupter X Management Registers. > @@ -620,7 +618,10 @@ XhcInitSched ( > // Allocate EventRing for Cmd, Ctrl, Bulk, Interrupt, AsynInterrupt tr= ansfer > // > CreateEventRing (Xhc, &Xhc->EventRing); > - DEBUG ((EFI_D_INFO, "XhcInitSched:XHC_EVENTRING=3D0x%x\n", Xhc- > >EventRing.EventRingSeg0)); > + DEBUG ((DEBUG_INFO, "XhcInitSched: Created CMD ring [%p~%p) EVENT > ring [%p~%p)\n", > + Xhc->CmdRing.RingSeg0, (UINTN)Xhc->CmdRing.RingSeg0 + sizeof > (TRB_TEMPLATE) * CMD_RING_TRB_NUMBER, > + Xhc->EventRing.EventRingSeg0, (UINTN)Xhc->EventRing.EventRingSeg0 + > sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER > + )); > } >=20 > /** > @@ -2671,6 +2672,11 @@ XhcInitializeEndpointContext ( > EndpointTransferRing =3D AllocateZeroPool(sizeof (TRANSFER_RIN= G)); > Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] =3D (VO= ID *) > EndpointTransferRing; > CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING > *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]); > + DEBUG ((DEBUG_INFO, "Endpoint[%x]: Created BULK ring [%p~%p)\n= ", > + EpDesc->EndpointAddress, > + EndpointTransferRing->RingSeg0, > + (UINTN) EndpointTransferRing->RingSeg0 + > TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE) > + )); > } >=20 > break; > @@ -2739,6 +2745,11 @@ XhcInitializeEndpointContext ( > EndpointTransferRing =3D AllocateZeroPool(sizeof (TRANSFER_RIN= G)); > Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] =3D (VO= ID *) > EndpointTransferRing; > CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING > *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]); > + DEBUG ((DEBUG_INFO, "Endpoint[%x]: Created INT ring [%p~%p)\n"= , > + EpDesc->EndpointAddress, > + EndpointTransferRing->RingSeg0, > + (UINTN) EndpointTransferRing->RingSeg0 + > TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE) > + )); > } > break; >=20 > @@ -2853,6 +2864,11 @@ XhcInitializeEndpointContext64 ( > EndpointTransferRing =3D AllocateZeroPool(sizeof (TRANSFER_RIN= G)); > Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] =3D (VO= ID *) > EndpointTransferRing; > CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING > *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]); > + DEBUG ((DEBUG_INFO, "Endpoint64[%x]: Created BULK ring [%p~%p)= \n", > + EpDesc->EndpointAddress, > + EndpointTransferRing->RingSeg0, > + (UINTN) EndpointTransferRing->RingSeg0 + > TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE) > + )); > } >=20 > break; > @@ -2921,6 +2937,11 @@ XhcInitializeEndpointContext64 ( > EndpointTransferRing =3D AllocateZeroPool(sizeof (TRANSFER_RIN= G)); > Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] =3D (VO= ID *) > EndpointTransferRing; > CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING > *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]); > + DEBUG ((DEBUG_INFO, "Endpoint64[%x]: Created INT ring [%p~%p)\= n", > + EpDesc->EndpointAddress, > + EndpointTransferRing->RingSeg0, > + (UINTN) EndpointTransferRing->RingSeg0 + > TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE) > + )); > } > break; >=20 > -- > 2.12.2.windows.2 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel