Re: [PATCH] UefiCpuPkg SecCore: Fix operands of different size in bitwise operation

["Wu, Hao A" <hao.a.wu@intel.com>]

Reviewed-by: Hao Wu <hao.a.wu@intel.com>


Best Regards,
Hao Wu


> -----Original Message-----
> From: Zeng, Star
> Sent: Wednesday, August 02, 2017 10:10 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star; Wu, Hao A; Gao, Liming; Fan, Jeff
> Subject: [PATCH] UefiCpuPkg SecCore: Fix operands of different size in bitwise
> operation
> 
> It is introduced by 9e9ca2100f22be29f1a53129d741f4305ff34a71.
> 
> Cc: Hao Wu <hao.a.wu@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Jeff Fan <jeff.fan@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Star Zeng <star.zeng@intel.com>
> ---
>  UefiCpuPkg/SecCore/SecMain.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c
> index e9e243ca0585..173bbfcfcba4 100644
> --- a/UefiCpuPkg/SecCore/SecMain.c
> +++ b/UefiCpuPkg/SecCore/SecMain.c
> @@ -281,7 +281,7 @@ SecStartupPhase2(
>      // will be built based on them in PEI phase.
>      //
>      SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData-
> >PeiTemporaryRamBase + 7) & ~0x07);
> -    SecCoreData->PeiTemporaryRamSize &= ~0x07;
> +    SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;
>    } else {
>      //
>      // No addition PPI, PpiList directly point to the common PPI list.
> --
> 2.7.0.windows.1