From: "Wu, Hao A" <hao.a.wu@intel.com>
To: "Wang, Jian J" <jian.j.wang@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Dong, Eric" <eric.dong@intel.com>
Subject: Re: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix bitwise size issue (K11)
Date: Thu, 12 Oct 2017 07:56:36 +0000 [thread overview]
Message-ID: <B80AF82E9BFB8E4FBD8C89DA810C6A0931D11673@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <20171012055934.13288-1-jian.j.wang@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Best Regards,
Hao Wu
> -----Original Message-----
> From: Wang, Jian J
> Sent: Thursday, October 12, 2017 2:00 PM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric; Wu, Hao A
> Subject: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix bitwise size issue (K11)
>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
> ---
> UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> index 0d3223d714..17459c790c 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> @@ -891,7 +891,7 @@ Gen4GPageTable (
> if ((Pte[0] & IA32_PG_PS) == 0) {
> // 4K-page entries are already mapped. Just hide the first one anyway.
> Pte = (UINT64*)(UINTN)(Pte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE -
> 1));
> - Pte[0] &= ~IA32_PG_P; // Hide page 0
> + Pte[0] &= ~(UINT64)IA32_PG_P; // Hide page 0
> } else {
> // Create 4K-page entries
> Pages = (UINTN)AllocatePageTableMemory (1);
> --
> 2.14.1.windows.1
prev parent reply other threads:[~2017-10-12 7:53 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-12 5:59 [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix bitwise size issue (K11) Jian J Wang
2017-10-12 7:56 ` Wu, Hao A [this message]
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