From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.24; helo=mga09.intel.com; envelope-from=hao.a.wu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D1C832095B09B for ; Thu, 12 Oct 2017 00:53:08 -0700 (PDT) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2017 00:56:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,365,1503385200"; d="scan'208";a="161786062" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga005.fm.intel.com with ESMTP; 12 Oct 2017 00:56:38 -0700 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 12 Oct 2017 00:56:38 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx110.amr.corp.intel.com (10.18.116.10) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 12 Oct 2017 00:56:37 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.152]) by shsmsx102.ccr.corp.intel.com ([169.254.2.175]) with mapi id 14.03.0319.002; Thu, 12 Oct 2017 15:56:36 +0800 From: "Wu, Hao A" To: "Wang, Jian J" , "edk2-devel@lists.01.org" CC: "Dong, Eric" Thread-Topic: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix bitwise size issue (K11) Thread-Index: AQHTQx9Ps5R5OssaQku/P9yAAGlXsaLf2O1g Date: Thu, 12 Oct 2017 07:56:36 +0000 Message-ID: References: <20171012055934.13288-1-jian.j.wang@intel.com> In-Reply-To: <20171012055934.13288-1-jian.j.wang@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix bitwise size issue (K11) X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Oct 2017 07:53:09 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Hao Wu Best Regards, Hao Wu > -----Original Message----- > From: Wang, Jian J > Sent: Thursday, October 12, 2017 2:00 PM > To: edk2-devel@lists.01.org > Cc: Dong, Eric; Wu, Hao A > Subject: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix bitwise size issue (K11) >=20 > Cc: Eric Dong > Cc: Hao A Wu > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jian J Wang > --- > UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > index 0d3223d714..17459c790c 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > @@ -891,7 +891,7 @@ Gen4GPageTable ( > if ((Pte[0] & IA32_PG_PS) =3D=3D 0) { > // 4K-page entries are already mapped. Just hide the first one any= way. > Pte =3D (UINT64*)(UINTN)(Pte[0] & ~mAddressEncMask & ~(EFI_PAGE_SI= ZE - > 1)); > - Pte[0] &=3D ~IA32_PG_P; // Hide page 0 > + Pte[0] &=3D ~(UINT64)IA32_PG_P; // Hide page 0 > } else { > // Create 4K-page entries > Pages =3D (UINTN)AllocatePageTableMemory (1); > -- > 2.14.1.windows.1