From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=hao.a.wu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 32787220EE069 for ; Sun, 3 Dec 2017 18:42:11 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Dec 2017 18:46:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,357,1508828400"; d="scan'208";a="9154616" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga003.jf.intel.com with ESMTP; 03 Dec 2017 18:46:40 -0800 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 3 Dec 2017 18:46:39 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 3 Dec 2017 18:46:39 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.152]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.93]) with mapi id 14.03.0319.002; Mon, 4 Dec 2017 10:46:37 +0800 From: "Wu, Hao A" To: Heyi Guo , "linaro-uefi@lists.linaro.org" , "edk2-devel@lists.01.org" CC: "Zeng, Star" , "Dong, Eric" , "Ni, Ruiyu" Thread-Topic: [PATCH v2] MdeModulePkg/NvmExpressDxe: fix error status override Thread-Index: AQHTbKe+Gvx/aB7dp0CHV7pnEcYtXaMyesaw Date: Mon, 4 Dec 2017 02:46:37 +0000 Message-ID: References: <1512354474-38200-1-git-send-email-heyi.guo@linaro.org> In-Reply-To: <1512354474-38200-1-git-send-email-heyi.guo@linaro.org> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2] MdeModulePkg/NvmExpressDxe: fix error status override X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 04 Dec 2017 02:42:11 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Hao Wu Best Regards, Hao Wu > -----Original Message----- > From: Heyi Guo [mailto:heyi.guo@linaro.org] > Sent: Monday, December 04, 2017 10:28 AM > To: linaro-uefi@lists.linaro.org; edk2-devel@lists.01.org > Cc: Heyi Guo; Zeng, Star; Dong, Eric; Wu, Hao A; Ni, Ruiyu > Subject: [PATCH v2] MdeModulePkg/NvmExpressDxe: fix error status override >=20 > Commit f6b139b added return status handling to PciIo->Mem.Write. > However, the second status handling will override EFI_DEVICE_ERROR > returned in this branch: >=20 > // > // Check the NVMe cmd execution result > // > if (Status !=3D EFI_TIMEOUT) { > if ((Cq->Sct =3D=3D 0) && (Cq->Sc =3D=3D 0)) { > Status =3D EFI_SUCCESS; > } else { > Status =3D EFI_DEVICE_ERROR; > ^^^^^^^^^^^^^^^^ >=20 > Since PciIo->Mem.Write will probably return SUCCESS, it causes > NvmExpressPassThru to return SUCCESS even when DEVICE_ERROR occurs. > Callers of NvmExpressPassThru will then continue executing which may > cause further unexpected results, e.g. DiscoverAllNamespaces couldn't > break out the loop. >=20 > So we save previous status before calling PciIo->Mem.Write and restore > the previous one if it already contains error. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Heyi Guo > Cc: Star Zeng > Cc: Eric Dong > Cc: Hao Wu > Cc: Ruiyu Ni > --- > MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 5 +++++ > 1 file changed, 5 insertions(+) >=20 > diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > index c33038f..7356c1d 100644 > --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > @@ -453,6 +453,7 @@ NvmExpressPassThru ( > { > NVME_CONTROLLER_PRIVATE_DATA *Private; > EFI_STATUS Status; > + EFI_STATUS PreviousStatus; > EFI_PCI_IO_PROTOCOL *PciIo; > NVME_SQ *Sq; > NVME_CQ *Cq; > @@ -831,6 +832,7 @@ NvmExpressPassThru ( > } >=20 > Data =3D ReadUnaligned32 ((UINT32*)&Private->CqHdbl[QueueId]); > + PreviousStatus =3D Status; > Status =3D PciIo->Mem.Write ( > PciIo, > EfiPciIoWidthUint32, > @@ -839,6 +841,9 @@ NvmExpressPassThru ( > 1, > &Data > ); > + // The return status of PciIo->Mem.Write should not override > + // previous status if previous status contains error. > + Status =3D EFI_ERROR (PreviousStatus) ? PreviousStatus : Status; >=20 > // > // For now, the code does not support the non-blocking feature for adm= in > queue. > -- > 2.7.2.windows.1