From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=hao.a.wu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8A1F7202E5453 for ; Thu, 28 Jun 2018 18:21:17 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 18:21:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,285,1526367600"; d="scan'208";a="70881649" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga002.jf.intel.com with ESMTP; 28 Jun 2018 18:20:37 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 28 Jun 2018 18:20:37 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.87]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.82]) with mapi id 14.03.0319.002; Fri, 29 Jun 2018 09:20:34 +0800 From: "Wu, Hao A" To: "Zeng, Star" , "edk2-devel@lists.01.org" CC: "Chan, Amy" , "Hsueh, Hong-chihX" , "Yao, Jiewen" , "Sami Mujawar" , "Ni, Ruiyu" Thread-Topic: [PATCH] MdeModulePkg SataControllerDxe: Calculate ChannelCount based on PI value Thread-Index: AQHUDsjH1k+z03+dTkm6HDCjBBXR16R2cRtw Date: Fri, 29 Jun 2018 01:20:34 +0000 Message-ID: References: <1530180838-174660-1-git-send-email-star.zeng@intel.com> In-Reply-To: <1530180838-174660-1-git-send-email-star.zeng@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg SataControllerDxe: Calculate ChannelCount based on PI value X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jun 2018 01:21:17 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Hao Wu Best Regards, Hao Wu > -----Original Message----- > From: Zeng, Star > Sent: Thursday, June 28, 2018 6:14 PM > To: edk2-devel@lists.01.org > Cc: Zeng, Star; Chan, Amy; Hsueh, Hong-chihX; Yao, Jiewen; Sami Mujawar; = Ni, > Ruiyu; Wu, Hao A > Subject: [PATCH] MdeModulePkg SataControllerDxe: Calculate ChannelCount > based on PI value >=20 > Current code calculates ChannelCount based on CAP(NP) value. > It only works when the ports implemented number are <=3D CAP(NP), > for example, platform has CAP(NP) =3D 5 (means 6 ports) and ports > implemented are 0, 1, 2, 3, 4 and 5. >=20 > But we have some platform that has CAP(NP) =3D 1 (means 2 ports) and > ports implemented are 1 and 2, and has no port 0 implemented, then > current code does not work. >=20 > This patch updates the code to calculate ChannelCount based on PI value. >=20 > Cc: Amy Chan > Cc: Hong-chihX Hsueh > Cc: Jiewen Yao > Cc: Sami Mujawar > Cc: Ruiyu Ni > Cc: Hao Wu > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > .../Bus/Pci/SataControllerDxe/SataController.c | 28 ++++++++++++++++= ++--- > - > .../Bus/Pci/SataControllerDxe/SataController.h | 1 + > 2 files changed, 25 insertions(+), 4 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c > b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c > index 7dc40f82e819..d47e918f5757 100644 > --- a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c > +++ b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c > @@ -366,6 +366,7 @@ SataControllerStart ( > UINT32 Data32; > UINTN TotalCount; > UINT64 Supports; > + UINT8 MaxPortNumber; >=20 > DEBUG ((EFI_D_INFO, "SataControllerStart start\n")); >=20 > @@ -472,12 +473,31 @@ SataControllerStart ( > Private->DeviceCount =3D IDE_MAX_DEVICES; > } else if (IS_PCI_SATADPA (&PciData)) { > // > - // Read Host Capability Register(CAP) to get Number of Ports(NPS) an= d > Supports Port Multiplier(SPM) > - // NPS is 0's based value indicating the maximum number of ports > supported by the HBA silicon. > - // A maximum of 32 ports can be supported. A value of '0h', indica= ting one > port, is the minimum requirement. > + // Read Ports Implemented(PI) to calculate max port number (0 based)= . > + // > + Data32 =3D AhciReadReg (PciIo, R_AHCI_PI); > + DEBUG ((DEBUG_INFO, "Ports Implemented(PI) =3D 0x%x\n", Data32)); > + if (Data32 =3D=3D 0) { > + Status =3D EFI_UNSUPPORTED; > + goto Done; > + } > + MaxPortNumber =3D 31; > + while (MaxPortNumber > 0) { > + if (Data32 & (1 << MaxPortNumber)) { > + break; > + } > + MaxPortNumber--; > + } > + // > + // Make the ChannelCount equal to the max port number (0 based) plus= 1. > + // > + Private->IdeInit.ChannelCount =3D MaxPortNumber + 1; > + > + // > + // Read HBA Capabilities(CAP) to get Supports Port Multiplier(SPM). > // > Data32 =3D AhciReadReg (PciIo, R_AHCI_CAP); > - Private->IdeInit.ChannelCount =3D (UINT8) ((Data32 & B_AHCI_CAP_NPS)= + 1); > + DEBUG ((DEBUG_INFO, "HBA Capabilities(CAP) =3D 0x%x\n", Data32)); > Private->DeviceCount =3D AHCI_MAX_DEVICES; > if ((Data32 & B_AHCI_CAP_SPM) =3D=3D B_AHCI_CAP_SPM) { > Private->DeviceCount =3D AHCI_MULTI_MAX_DEVICES; > diff --git a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h > b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h > index 436eff2dc673..7ffd3e218a61 100644 > --- a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h > +++ b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h > @@ -44,6 +44,7 @@ extern EFI_COMPONENT_NAME2_PROTOCOL > gSataControllerComponentName2; > #define R_AHCI_CAP 0x0 > #define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of > Ports > #define B_AHCI_CAP_SPM BIT17 // Supports = Port Multiplier > +#define R_AHCI_PI 0xC >=20 > /// > /// AHCI each channel can have up to 1 device > -- > 2.7.0.windows.1