From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=hao.a.wu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 72791211158F2 for ; Tue, 4 Sep 2018 23:29:34 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Sep 2018 23:29:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,332,1531810800"; d="scan'208";a="254617566" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga005.jf.intel.com with ESMTP; 04 Sep 2018 23:29:21 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 4 Sep 2018 23:29:13 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.143]) by shsmsx102.ccr.corp.intel.com ([169.254.2.226]) with mapi id 14.03.0319.002; Wed, 5 Sep 2018 14:29:04 +0800 From: "Wu, Hao A" To: Marcin Wojtas , "edk2-devel@lists.01.org" CC: "nadavh@marvell.com" , "Kinney, Michael D" , Ard Biesheuvel Thread-Topic: [edk2] [PATCH 0/7] SdMmc fixes and SdMmcOverride extension Thread-Index: AQHUQ0I4Jh6DTJvJRkODSO+G0Fbe8aThOyKA Date: Wed, 5 Sep 2018 06:29:03 +0000 Message-ID: References: <1535950453-27147-1-git-send-email-mw@semihalf.com> In-Reply-To: <1535950453-27147-1-git-send-email-mw@semihalf.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 0/7] SdMmc fixes and SdMmcOverride extension X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Sep 2018 06:29:34 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi, I will take a look into this series. It might take me some time for the review, please help to ping this mail thread if there is no response from me in 2 weeks. Sorry for the possible delay. Also, cc Ard in the list to see if he has any comment on this. As Ard is the contributor of the SD/MMC override protocol. Best Regards, Hao Wu > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Marcin Wojtas > Sent: Monday, September 03, 2018 12:54 PM > To: edk2-devel@lists.01.org > Cc: Tian, Feng; nadavh@marvell.com; Gao, Liming; Kinney, Michael D > Subject: [edk2] [PATCH 0/7] SdMmc fixes and SdMmcOverride extension >=20 > Hi, >=20 > This patchset extends SdMmcOverride protocol with new callbacks: > * UhsSignaling - allow writing custom values to HostControl2 register > * SwitchClockFreqPost - perform additional opperations after clock switch > * BaseClockFreq - allow overriding base clock frequency > Also a couple of fixes for MMC, card detection and reset are submitted. > More details can be found in the commit messages. >=20 > Patches are available in the github: > https://github.com/MarvellEmbeddedProcessors/edk2-open- > platform/commits/sdmmc-override-upstream-r20180902 >=20 > Please note that extending SdMmcOverride protocol was impacting > so far the only user of it (Synquacer controller). In paralel > edk2-platforms patchset, a patch can be found: > ("Silicon/SynQuacer/PlatformDxe: Modify initialization of SdMmcOverride") > which immunizes for above and future extensions of the protocol: > https://github.com/MarvellEmbeddedProcessors/edk2-open- > platform/commits/xenon-upstream-r20180902 >=20 > I'm looking forward to the comments and remarks. >=20 > Best regards, > Marcin >=20 > Marcin Wojtas (3): > MdeModulePkg/SdMmcPciHcDxe: Fix HS200 operation > MdeModulePkg/SdMmcPciHcDxe: Adjust eMMC clock and bus width sequence > MdeModulePkg/SdMmcPciHcDxe: Execute card detect only for RemovableSlot >=20 > Tomasz Michalec (4): > MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride > protocol > MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to SdMmcOverride > MdeModulePkg/SdMmcPciHcDxe: Allow overriding base clock frequency > MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits >=20 > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 6 + > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 67 +++++- > MdeModulePkg/Include/Protocol/SdMmcOverride.h | 83 ++++++- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 246 > +++++++++++++------- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 55 ++++- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c | 37 ++- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 102 ++++++-- > 7 files changed, 467 insertions(+), 129 deletions(-) >=20 > -- > 2.7.4 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel