Re: [PATCH v3 2/3] MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits

["Wu, Hao A" <hao.a.wu@intel.com>]

> -----Original Message-----
> From: Marcin Wojtas [mailto:mw@semihalf.com]
> Sent: Monday, September 17, 2018 11:00 PM
> To: Wu, Hao A
> Cc: edk2-devel-01; Tomasz Michalec; nadavh@marvell.com; Gao, Liming;
> Kinney, Michael D
> Subject: Re: [edk2] [PATCH v3 2/3] MdeModulePkg/SdMmcPciHcDxe: Fix
> SdMmcHcReset to set only necesery bits
> 
> Hi Hao,
> 
> pon., 17 wrz 2018 o 09:17 Wu, Hao A <hao.a.wu@intel.com> napisał(a):
> >
> > > -----Original Message-----
> > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> > > Marcin Wojtas
> > > Sent: Sunday, September 16, 2018 6:26 AM
> > > To: edk2-devel@lists.01.org
> > > Cc: Tian, Feng; tm@semihalf.com; Wu, Hao A; nadavh@marvell.com; Gao,
> > > Liming; Kinney, Michael D
> > > Subject: [edk2] [PATCH v3 2/3] MdeModulePkg/SdMmcPciHcDxe: Fix
> > > SdMmcHcReset to set only necesery bits
> > >
> > > From: Tomasz Michalec <tm@semihalf.com>
> > >
> > > SdMmcHcReset used to set all bits of Software Reset Register to 1
> > > including reserved ones.
> >
> > Hi,
> >
> > I did a quick search of the SD Host Controller Simplified Specification, I
> > do not find the spec prohibit setting all the bits when performing a reset
> > for the host controller.
> >
> > Do you met with issues during the controller reset with the current logic?
> >
> 
> Yes, with SwResetMask = 0xFF, on all my boards (regardless speed),
> SdMmcHcWaitMmioSet times out on each interface. With
> SwReset = SD_MMC_HC_SW_RST_ALL it's all ok.

Thanks Marcin,

Got it. Could you help to file a EDK2 Bugzilla tracker as well? Thanks in
advance.

Also some minor comments below:

> 
> Best regards,
> Marcin
> 
> > Best Regards,
> > Hao Wu
> >
> > >
> > > Now only first bit is set which means "Software Reset for All".
> > >
> > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> > > ---
> > >  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 5 +++++
> > >  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 6 +++---
> > >  2 files changed, 8 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
> > > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
> > > index e389d52..bcc31bd 100644
> > > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
> > > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
> > > @@ -63,6 +63,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF
> ANY
> > > KIND, EITHER EXPRESS OR IMPLIED.
> > >  #define SD_MMC_HC_CTRL_VER            0xFE
> > >
> > >  //
> > > +// SD Software Reset Register bits description
> > > +//
> > > +#define SD_MMC_HC_SW_RST_ALL          BIT0

I think you can directly use BIT0 in .c file rather than introducing a new
macro here when performing "Software Reset for All".

> > > +
> > > +//
> > >  // The transfer modes supported by SD Host Controller
> > >  // Simplified Spec 3.0 Table 1-2
> > >  //
> > > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> > > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> > > index 9672b5b..9d9bca8 100644
> > > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> > > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> > > @@ -454,8 +454,8 @@ SdMmcHcReset (
> > >    }
> > >
> > >    PciIo   = Private->PciIo;
> > > -  SwReset = 0xFF;
> > > -  Status  = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_SW_RST, FALSE,
> sizeof
> > > (SwReset), &SwReset);
> > > +  SwReset = SD_MMC_HC_SW_RST_ALL;
> > > +  Status  = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_SW_RST, sizeof
> > > (SwReset), &SwReset);
> > >
> > >    if (EFI_ERROR (Status)) {
> > >      DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write full 1 fails: %r\n",
> Status));

Could you help to refine the debug message above to reflect the change?

Best Regards,
Hao Wu

> > > @@ -467,7 +467,7 @@ SdMmcHcReset (
> > >               Slot,
> > >               SD_MMC_HC_SW_RST,
> > >               sizeof (SwReset),
> > > -             0xFF,
> > > +             SD_MMC_HC_SW_RST_ALL,
> > >               0x00,
> > >               SD_MMC_HC_GENERIC_TIMEOUT
> > >               );
> > > --
> > > 2.7.4
> > >
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