From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.136; helo=mga12.intel.com; envelope-from=hao.a.wu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 74CB621189F8E for ; Thu, 1 Nov 2018 00:06:17 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Nov 2018 00:06:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,451,1534834800"; d="scan'208";a="246116102" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga004.jf.intel.com with ESMTP; 01 Nov 2018 00:06:16 -0700 Received: from fmsmsx117.amr.corp.intel.com (10.18.116.17) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 1 Nov 2018 00:06:05 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx117.amr.corp.intel.com (10.18.116.17) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 1 Nov 2018 00:06:04 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.117]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.199]) with mapi id 14.03.0415.000; Thu, 1 Nov 2018 15:06:03 +0800 From: "Wu, Hao A" To: 'Marcin Wojtas' , "edk2-devel@lists.01.org" CC: "tm@semihalf.com" , "nadavh@marvell.com" , "Gao, Liming" , "Kinney, Michael D" Thread-Topic: [edk2] [PATCH v2 3/4] MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to SdMmcOverride Thread-Index: AQHUXK7wnx0jZ5DBt0WE8TcV9dSmsKU3aLsA Date: Thu, 1 Nov 2018 07:06:02 +0000 Message-ID: References: <1538745911-22484-1-git-send-email-mw@semihalf.com> <1538745911-22484-4-git-send-email-mw@semihalf.com> In-Reply-To: <1538745911-22484-4-git-send-email-mw@semihalf.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2 3/4] MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to SdMmcOverride X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Nov 2018 07:06:17 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Marcin Wojtas > Sent: Friday, October 05, 2018 9:25 PM > To: edk2-devel@lists.01.org > Cc: Tian, Feng; tm@semihalf.com; Wu, Hao A; nadavh@marvell.com; Gao, > Liming; Kinney, Michael D > Subject: [edk2] [PATCH v2 3/4] MdeModulePkg/SdMmcPciHcDxe: Add > SwitchClockFreqPost to SdMmcOverride >=20 > From: Tomasz Michalec >=20 > Some SD Host Controlers need to do additional opperations after clock > frequency switch. >=20 > This patch add new callback type to NotifyPhase of the SdMmcOverride > protocol. It is called after EmmcSwitchClockFreq and SdMmcHcClockSupply. Hi Marcin, Just curious, I had a quick glance at the implementation of the XenonSwitchClockFreqPost() in your platform part changes. Are those operati= ons within the function mandatory during the HC initialization? Are they mainly= for performance or stability consideration? I am wondering if this kind of customization is common among the SD & eMMC devices. Best Regards, Hao Wu >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > --- > MdeModulePkg/Include/Protocol/SdMmcOverride.h | 1 + > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 60 > ++++++++++++++++++++ > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 18 ++++++ > 3 files changed, 79 insertions(+) >=20 > diff --git a/MdeModulePkg/Include/Protocol/SdMmcOverride.h > b/MdeModulePkg/Include/Protocol/SdMmcOverride.h > index 25db98a..d9daada 100644 > --- a/MdeModulePkg/Include/Protocol/SdMmcOverride.h > +++ b/MdeModulePkg/Include/Protocol/SdMmcOverride.h > @@ -33,6 +33,7 @@ typedef enum { > EdkiiSdMmcInitHostPre, > EdkiiSdMmcInitHostPost, > EdkiiSdMmcUhsSignaling, > + EdkiiSdMmcSwitchClockFreqPost, > } EDKII_SD_MMC_PHASE_TYPE; >=20 > /** > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c > index 05bd4a0..7e75283 100755 > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c > @@ -796,6 +796,27 @@ EmmcSwitchToHighSpeed ( >=20 > HsTiming =3D 1; > Status =3D EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, > ClockFreq); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (mOverride !=3D NULL && mOverride->NotifyPhase !=3D NULL) { > + Status =3D mOverride->NotifyPhase ( > + Private->ControllerHandle, > + Slot, > + EdkiiSdMmcSwitchClockFreqPost, > + &Timing > + ); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: SD/MMC switch clock freq post notifier callback failed - %r= \n", > + __FUNCTION__, > + Status > + )); > + return Status; > + } > + } >=20 > return Status; > } > @@ -905,6 +926,24 @@ EmmcSwitchToHS200 ( > return Status; > } >=20 > + if (mOverride !=3D NULL && mOverride->NotifyPhase !=3D NULL) { > + Status =3D mOverride->NotifyPhase ( > + Private->ControllerHandle, > + Slot, > + EdkiiSdMmcSwitchClockFreqPost, > + &Timing > + ); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: SD/MMC switch clock freq post notifier callback failed - %r= \n", > + __FUNCTION__, > + Status > + )); > + return Status; > + } > + } > + > Status =3D EmmcTuningClkForHs200 (PciIo, PassThru, Slot, BusWidth); >=20 > return Status; > @@ -989,6 +1028,27 @@ EmmcSwitchToHS400 ( >=20 > HsTiming =3D 3; > Status =3D EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, > ClockFreq); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (mOverride !=3D NULL && mOverride->NotifyPhase !=3D NULL) { > + Status =3D mOverride->NotifyPhase ( > + Private->ControllerHandle, > + Slot, > + EdkiiSdMmcSwitchClockFreqPost, > + &Timing > + ); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: SD/MMC switch clock freq post notifier callback failed - %r= \n", > + __FUNCTION__, > + Status > + )); > + return Status; > + } > + } >=20 > return Status; > } > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c > index 5645a71..057a4e2 100644 > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c > @@ -887,6 +887,24 @@ SdCardSetBusMode ( > return Status; > } >=20 > + if (mOverride !=3D NULL && mOverride->NotifyPhase !=3D NULL) { > + Status =3D mOverride->NotifyPhase ( > + Private->ControllerHandle, > + Slot, > + EdkiiSdMmcSwitchClockFreqPost, > + &Timing > + ); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: SD/MMC switch clock freq post notifier callback failed - %r= \n", > + __FUNCTION__, > + Status > + )); > + return Status; > + } > + } > + > if ((AccessMode =3D=3D 3) || ((AccessMode =3D=3D 2) && (Capability- > >TuningSDR50 !=3D 0))) { > Status =3D SdCardTuningClock (PciIo, PassThru, Slot); > if (EFI_ERROR (Status)) { > -- > 2.7.4 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel