From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.93; helo=mga11.intel.com; envelope-from=hao.a.wu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4D73121B02822 for ; Thu, 22 Nov 2018 01:02:19 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Nov 2018 01:02:18 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,265,1539673200"; d="scan'208";a="108390719" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga004.fm.intel.com with ESMTP; 22 Nov 2018 01:02:18 -0800 Received: from fmsmsx119.amr.corp.intel.com (10.18.124.207) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.408.0; Wed, 21 Nov 2018 21:01:34 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX119.amr.corp.intel.com (10.18.124.207) with Microsoft SMTP Server (TLS) id 14.3.408.0; Wed, 21 Nov 2018 21:00:55 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.117]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.161]) with mapi id 14.03.0415.000; Thu, 22 Nov 2018 13:00:53 +0800 From: "Wu, Hao A" To: "Chiu, Chasel" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" Thread-Topic: [edk2] [PATCH v2 1/2] IntelFsp2WrapperPkg: Fix line ending format issue Thread-Index: AQHUghazaiT6ZE9/uE+zg0wLOuJtMaVbPGGg Date: Thu, 22 Nov 2018 05:00:53 +0000 Message-ID: References: <20181122035103.16940-1-chasel.chiu@intel.com> <20181122035103.16940-2-chasel.chiu@intel.com> In-Reply-To: <20181122035103.16940-2-chasel.chiu@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2 1/2] IntelFsp2WrapperPkg: Fix line ending format issue X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Nov 2018 09:02:19 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Chasel, Chiu > Sent: Thursday, November 22, 2018 11:51 AM > To: edk2-devel@lists.01.org > Cc: Wu, Hao A; Yao, Jiewen > Subject: [edk2] [PATCH v2 1/2] IntelFsp2WrapperPkg: Fix line ending forma= t > issue >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1352 >=20 > Fixed line ending format wrong issues on some files. >=20 > Test: Verified building successfully. Reviewed-by: Hao Wu Best Regards, Hao Wu >=20 > Cc: Jiewen Yao > Cc: Desimone Nathaniel L > Cc: Wu Hao A > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Chasel Chiu > --- > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 32 > ++++++++++++++++---------------- > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 24 > ++++++++++++------------ > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 4 ++-- > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 4 ++-- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 22 +++++++++++= --- > -------- > 5 files changed, 43 insertions(+), 43 deletions(-) >=20 > diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > index e25854c080..fa0441ce6c 100644 > --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > @@ -3,7 +3,7 @@ > register TemporaryRamDonePpi to call TempRamExit API, and register > MemoryDiscoveredPpi > notify to call FspSiliconInit API. >=20 > - Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License > which accompanies this distribution. The full text of the license may= be > found at > @@ -65,7 +65,7 @@ PeiFspMemoryInit ( > FspHobListPtr =3D NULL; > FspmUpdDataPtr =3D NULL; >=20 > - FspmHeaderPtr =3D (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 > (PcdFspmBaseAddress)); > + FspmHeaderPtr =3D (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 > (PcdFspmBaseAddress)); > DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr)); > if (FspmHeaderPtr =3D=3D NULL) { > return EFI_DEVICE_ERROR; > @@ -155,20 +155,20 @@ FspmWrapperInit ( > { > EFI_STATUS Status; >=20 > - Status =3D EFI_SUCCESS; > - > - if (FixedPcdGet8 (PcdFspModeSelection) =3D=3D 1) { > - Status =3D PeiFspMemoryInit (); > - ASSERT_EFI_ERROR (Status); > - } else { > - PeiServicesInstallFvInfoPpi ( > - NULL, > - (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress), > - (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 > (PcdFspmBaseAddress))->FvLength, > - NULL, > - NULL > - ); > - } > + Status =3D EFI_SUCCESS; > + > + if (FixedPcdGet8 (PcdFspModeSelection) =3D=3D 1) { > + Status =3D PeiFspMemoryInit (); > + ASSERT_EFI_ERROR (Status); > + } else { > + PeiServicesInstallFvInfoPpi ( > + NULL, > + (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress), > + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 > (PcdFspmBaseAddress))->FvLength, > + NULL, > + NULL > + ); > + } >=20 > return Status; > } > diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > index 69cf568380..87dd61e5c5 100644 > --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > @@ -3,7 +3,7 @@ > register TemporaryRamDonePpi to call TempRamExit API, and register > MemoryDiscoveredPpi > notify to call FspSiliconInit API. >=20 > - Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License > which accompanies this distribution. The full text of the license may= be > found at > @@ -349,17 +349,17 @@ FspsWrapperPeimEntryPoint ( > { > DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n")); >=20 > - if (FixedPcdGet8 (PcdFspModeSelection) =3D=3D 1) { > - FspsWrapperInit (); > - } else { > - PeiServicesInstallFvInfoPpi ( > - NULL, > - (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress), > - (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 > (PcdFspsBaseAddress))->FvLength, > - NULL, > - NULL > - ); > - } > + if (FixedPcdGet8 (PcdFspModeSelection) =3D=3D 1) { > + FspsWrapperInit (); > + } else { > + PeiServicesInstallFvInfoPpi ( > + NULL, > + (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress), > + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 > (PcdFspsBaseAddress))->FvLength, > + NULL, > + NULL > + ); > + } >=20 > return EFI_SUCCESS; > } > diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > index f4b7ef8db6..b3776a80f3 100644 > --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > @@ -6,7 +6,7 @@ > # register TemporaryRamDonePpi to call TempRamExit API, and register > MemoryDiscoveredPpi > # notify to call FspSiliconInit API. > # > -# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved. > +# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved. > # > # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the > BSD License > @@ -61,7 +61,7 @@ > [Pcd] > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## > CONSUMES > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## > CONSUMES > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## > CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## > CONSUMES >=20 > [Sources] > FspmWrapperPeim.c > diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > index 1e63f407cb..910286982b 100644 > --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > @@ -6,7 +6,7 @@ > # register TemporaryRamDonePpi to call TempRamExit API, and register > MemoryDiscoveredPpi > # notify to call FspSiliconInit API. > # > -# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved. > +# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved. > # > # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the > BSD License > @@ -68,7 +68,7 @@ > [Pcd] > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## > CONSUMES > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## > CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## > CONSUMES >=20 > [Guids] > gFspHobGuid ## CONSUMES ## HOB > diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index b901562bb3..96f2858fb4 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -71,7 +71,7 @@ > ## Indicate the PEI memory size platform want to report >=20 > gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x300000 > 0|UINT32|0x40000005 >=20 > - ## This is the base address of FSP-T > + ## This is the base address of FSP-T >=20 > gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT > 32|0x00000300 >=20 > ## This PCD indicates if FSP APIs are skipped from FSP wrapper.
> @@ -92,17 +92,17 @@ > # @Prompt Skip FSP API from FSP wrapper. >=20 > gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x4 > 0000009 >=20 > - ## This PCD decides how Wrapper code utilizes FSP > - # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without > calling FSP API) > - # 1: API mode (FSP Wrapper will call FSP API) > - # > - > gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UIN > T8|0x4000000A > - > + ## This PCD decides how Wrapper code utilizes FSP > + # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without > calling FSP API) > + # 1: API mode (FSP Wrapper will call FSP API) > + # > + > gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UIN > T8|0x4000000A > + > [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx] > - # > - ## These are the base address of FSP-M/S > - # > - > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UIN > T32|0x00001000 > + # > + ## These are the base address of FSP-M/S > + # > + > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UIN > T32|0x00001000 >=20 > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT > 32|0x00001001 > # > # To provide flexibility for platform to pre-allocate FSP UPD buffer > -- > 2.13.3.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel