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From: "Wu, Hao A" <hao.a.wu@intel.com>
To: Mike M <mike.maslenkin@gmail.com>,
	"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Ni, Ruiyu" <ruiyu.ni@intel.com>, "Wang, Jian J" <jian.j.wang@intel.com>
Subject: Re: Question about UfsPassThruDxe driver
Date: Mon, 24 Dec 2018 03:54:02 +0000	[thread overview]
Message-ID: <B80AF82E9BFB8E4FBD8C89DA810C6A093C86499E@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <CAL77WPC8m8MeXFeT3AHGzFm5Z9g8Uw09bqGnin=1VnvPC_kQ-Q@mail.gmail.com>

Hi,

Yes, the understanding in your latest reply is correct.

Best Regards,
Hao Wu

From: Mike M [mailto:mike.maslenkin@gmail.com]
Sent: Monday, December 24, 2018 10:04 AM
To: edk2-devel@lists.01.org
Cc: Ni, Ruiyu; Wang, Jian J; Wu, Hao A
Subject: Re: Question about UfsPassThruDxe driver

Sorry for the noise. Once I sent this question I understood this code.
I overlooked UTP_TRD and UTP_TR_PRD declarations where lower 32-bit of a physical address declared as a bitfield...
There are no shifts when HCI programmed via MMIO.


On Sat, Dec 22, 2018 at 1:43 AM Mike M <mike.maslenkin@gmail.com<mailto:mike.maslenkin@gmail.com>> wrote:
Dear MdeModulePkg maintainers, I'm a bit baffled about a way
physical addresses passed to UFS HCI at UfsPassThruDxe driver.
For example, UFS HCI V.2.1 declares Data Base Address in PRDT structure as two 32 bit words,
where bits 0 and 1 of a physical address are reserved.
As well UTP Command Descriptor Base Address (UCDBA) shall be aligned to 128-byte address,
i.e. bits [06:00] are reserved.
In common such reserved bits are being cleared by AND operation
with appropriate mask, while in UfsPassThruDxe right shift operator is used as below:
    Prdt[PrdtIndex].DbAddr  = (UINT32)RShiftU64 ((UINT64)(UINTN)Remaining, 2);
    Prdt[PrdtIndex].DbAddrU = (UINT32)RShiftU64 ((UINT64)(UINTN)Remaining, 32);
and
  Trd->UcdBa  = (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 7);
  Trd->UcdBaU = (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 32);
How does UFS HCI deal with such values?  This doesn't look correct.
Would you like I prepare a patch replacing RShiftU64 operator with bitwise AND operator
for lower 32-bit of a physical address value?

      reply	other threads:[~2018-12-24  3:54 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-21 22:43 Question about UfsPassThruDxe driver Mike M
2018-12-24  2:03 ` Mike M
2018-12-24  3:54   ` Wu, Hao A [this message]

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