From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: hao.a.wu@intel.com) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by groups.io with SMTP; Mon, 29 Apr 2019 00:52:17 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Apr 2019 00:52:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,408,1549958400"; d="scan'208";a="144457023" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga008.fm.intel.com with ESMTP; 29 Apr 2019 00:52:17 -0700 Received: from shsmsx153.ccr.corp.intel.com (10.239.6.53) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 29 Apr 2019 00:52:16 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.33]) by SHSMSX153.ccr.corp.intel.com ([169.254.12.150]) with mapi id 14.03.0415.000; Mon, 29 Apr 2019 15:52:15 +0800 From: "Wu, Hao A" To: "devel@edk2.groups.io" , "Wu, Hao A" , "Loh, Tien Hock" , "thloh85@gmail.com" CC: "Wang, Jian J" Subject: Re: [edk2-devel] [PATCH v5 1/1] MdeModulePkg: BaseSerialPortLib16550: Add Mmio32 support Thread-Topic: [edk2-devel] [PATCH v5 1/1] MdeModulePkg: BaseSerialPortLib16550: Add Mmio32 support Thread-Index: AQHU+/ktlUwQ50yh+k65jfGmFIbgf6ZOHaFQgASrDLA= Date: Mon, 29 Apr 2019 07:52:15 +0000 Message-ID: References: <1556260004-121902-1-git-send-email-tien.hock.loh@intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: hao.a.wu@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Wu= , > Hao A > Sent: Friday, April 26, 2019 4:35 PM > To: Loh, Tien Hock; devel@edk2.groups.io; thloh85@gmail.com > Cc: Wang, Jian J > Subject: Re: [edk2-devel] [PATCH v5 1/1] MdeModulePkg: > BaseSerialPortLib16550: Add Mmio32 support >=20 > > -----Original Message----- > > From: Loh, Tien Hock > > Sent: Friday, April 26, 2019 2:27 PM > > To: devel@edk2.groups.io; thloh85@gmail.com > > Cc: Loh, Tien Hock; Wang, Jian J; Wu, Hao A > > Subject: [PATCH v5 1/1] MdeModulePkg: BaseSerialPortLib16550: Add > Mmio32 > > support > > > > From: "Tien Hock, Loh" > > > > Some busses doesn't allow 8 bit MMIO read/write, this adds support for > > 32 bits read/write > > > > Signed-off-by: "Tien Hock, Loh" > > Cc: Jian J Wang > > Cc: Hao Wu > > > > --- > > v5 > > - Updates function header comments > > - Change the implementation to eliminate unnecessary else clause >=20 > Looks good to me, > Reviewed-by: Hao Wu >=20 > I will wait some time before pushing to see if there are additional > comments from others. Thanks for the contribution. Push via commit 8a472b1915. Best Regards, Hao Wu >=20 > Best Regards, > Hao Wu >=20 > > v4 > > - Updates Pcd name to a better name: PcdSerialRegisterAccessWidth > > v3 > > - Updates the Pcd to be UINT8 to allow more options such as 16 bits ac= cess > > in the future > > - Updated copyright date > > v2 > > - Updates the Pcd name to PcdSerialMmio32BitAccess and access 32 bits > > register if PcdSerialUseMmio and PcdSerialMmio32BitAccess is set > > --- > > .../BaseSerialPortLib16550/BaseSerialPortLib16550.c | 14 +++++= ++++++- > -- > > .../BaseSerialPortLib16550/BaseSerialPortLib16550.inf | 3 ++- > > MdeModulePkg/MdeModulePkg.dec | 7 +++++= ++ > > 3 files changed, 20 insertions(+), 4 deletions(-) > > > > diff --git > > a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c > > b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c > > index 34df34d..bbae379 100644 > > --- > a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c > > +++ > > b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c > > @@ -2,7 +2,7 @@ > > 16550 UART Serial Port library functions > > > > (C) Copyright 2014 Hewlett-Packard Development Company, L.P.
> > - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<= BR> > > + Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<= BR> > > Copyright (c) 2018, AMD Incorporated. All rights reserved.
> > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > @@ -62,7 +62,8 @@ typedef struct { > > Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then th= e value > is > > read from > > MMIO space. If PcdSerialUseMmio is FALSE, then the value is read f= rom > I/O > > space. The > > parameter Offset is added to the base address of the 16550 register= s that is > > specified > > - by PcdSerialRegisterBase. > > + by PcdSerialRegisterBase. PcdSerialRegisterAccessWidth specifies th= e > MMIO > > space access > > + width and defaults to 8 bit access, and supports 8 or 32 bit access= . > > > > @param Base The base address register of UART device. > > @param Offset The offset of the 16550 register to read. > > @@ -77,6 +78,9 @@ SerialPortReadRegister ( > > ) > > { > > if (PcdGetBool (PcdSerialUseMmio)) { > > + if (PcdGet8 (PcdSerialRegisterAccessWidth) =3D=3D 32) { > > + return (UINT8) MmioRead32 (Base + Offset * PcdGet32 > > (PcdSerialRegisterStride)); > > + } > > return MmioRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStri= de)); > > } else { > > return IoRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride= )); > > @@ -87,7 +91,8 @@ SerialPortReadRegister ( > > Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then t= he value > is > > written to > > MMIO space. If PcdSerialUseMmio is FALSE, then the value is writte= n to > I/O > > space. The > > parameter Offset is added to the base address of the 16550 register= s that is > > specified > > - by PcdSerialRegisterBase. > > + by PcdSerialRegisterBase. PcdSerialRegisterAccessWidth specifies th= e > MMIO > > space access > > + width and defaults to 8 bit access, and supports 8 or 32 bit access= . > > > > @param Base The base address register of UART device. > > @param Offset The offset of the 16550 register to write. > > @@ -104,6 +109,9 @@ SerialPortWriteRegister ( > > ) > > { > > if (PcdGetBool (PcdSerialUseMmio)) { > > + if (PcdGet8 (PcdSerialRegisterAccessWidth) =3D=3D 32) { > > + return (UINT8) MmioWrite32 (Base + Offset * PcdGet32 > > (PcdSerialRegisterStride), (UINT8)Value); > > + } > > return MmioWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStr= ide), > > Value); > > } else { > > return IoWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStrid= e), > Value); > > diff --git > > > a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf > > > b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf > > index b60779c..8b4ae3f 100644 > > --- > > > a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf > > +++ > > > b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf > > @@ -1,7 +1,7 @@ > > ## @file > > # SerialPortLib instance for 16550 UART. > > # > > -# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.=
> > +# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.=
> > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > ## > > @@ -29,6 +29,7 @@ > > BaseSerialPortLib16550.c > > > > [Pcd] > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth ## > > SOMETIMES_CONSUMES > > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## > > CONSUMES > > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## > > CONSUMES > > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## > > SOMETIMES_CONSUMES > > diff --git a/MdeModulePkg/MdeModulePkg.dec > > b/MdeModulePkg/MdeModulePkg.dec > > index be84916..2ef48f2 100644 > > --- a/MdeModulePkg/MdeModulePkg.dec > > +++ b/MdeModulePkg/MdeModulePkg.dec > > @@ -1170,6 +1170,13 @@ > > # @Prompt Serial port registers use MMIO. > > > > > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE|BOOLEAN|0x00 > > 020000 > > > > + ## Indicates the access width for 16550 serial port registers. > > + # Default is 8-bit access mode.

> > + # 8 - 16550 serial port registers are accessed in 8-bit width.<= BR> > > + # 32 - 16550 serial port registers are accessed in 32-bit width.<= BR> > > + # @Prompt Serial port register access width. > > + > > > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|8|UINT8|0x > > 00020007 > > + > > ## Indicates if the 16550 serial port hardware flow control will be= enabled. > > Default is FALSE.

> > # TRUE - 16550 serial port hardware flow control will be enabled= .
> > # FALSE - 16550 serial port hardware flow control will be disable= d.
> > -- > > 2.2.2 >=20 >=20 >=20