From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: hao.a.wu@intel.com) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by groups.io with SMTP; Sun, 23 Jun 2019 18:10:24 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Jun 2019 18:10:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,410,1557212400"; d="scan'208";a="161475436" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga008.fm.intel.com with ESMTP; 23 Jun 2019 18:10:22 -0700 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 23 Jun 2019 18:10:22 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 23 Jun 2019 18:10:21 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.185]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.246]) with mapi id 14.03.0439.000; Mon, 24 Jun 2019 09:10:20 +0800 From: "Wu, Hao A" To: "devel@edk2.groups.io" , "Wu, Hao A" , "Chu, Maggie" CC: "Wang, Jian J" , "Ni, Ray" , "Zeng, Star" Subject: Re: [edk2-devel] [PATCH] MdeModulePkg: Add definitions for NVM Express Passthru PPI Thread-Topic: [edk2-devel] [PATCH] MdeModulePkg: Add definitions for NVM Express Passthru PPI Thread-Index: AQHVJLHnhCh2Lr+8h0OUi0vaIDTkHqahWmlQgAivGoA= Date: Mon, 24 Jun 2019 01:10:19 +0000 Message-ID: References: <20190617021043.16588-1-maggie.chu@intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: hao.a.wu@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Wu, Hao A > Sent: Tuesday, June 18, 2019 8:34 PM > To: Chu, Maggie; devel@edk2.groups.io > Cc: Wang, Jian J; Ni, Ray; Zeng, Star > Subject: Re: [edk2-devel] [PATCH] MdeModulePkg: Add definitions for NVM > Express Passthru PPI >=20 > > -----Original Message----- > > From: Chu, Maggie > > Sent: Monday, June 17, 2019 10:11 AM > > To: devel@edk2.groups.io > > Cc: Wu, Hao A; Wang, Jian J; Ni, Ray; Zeng, Star > > Subject: [PATCH] MdeModulePkg: Add definitions for NVM Express > Passthru > > PPI > > > > https://bugzilla.tianocore.org/show_bug.cgi?id=3D1879 > > This commit will add the definitions of Nvm Express PassThru PPI. > > This PPI will provide services that allow NVM commands to be sent > > to NVM Express devices during PEI phase. > > > > More specifically, the PPI will provide services to: > > > > * Sends an NVM Express Command Packet to an NVM Express controller > > or namespace (by service 'PassThru'); > > * Get the list of the attached namespaces on a controller > > (by services 'GetNextNameSpace'); > > * Get the identification information (DevicePath) of the underlying > > NVM Express host controller (by service 'GetDevicePath'). > > > > Signed-off-by: Maggie Chu > > Cc: Hao A Wu > > Cc: Jian J Wang > > Cc: Ray Ni > > Cc: Star Zeng > > --- > > MdeModulePkg/Include/Ppi/NvmExpressPassThru.h | 156 > > ++++++++++++++++++++++++++ > > MdeModulePkg/MdeModulePkg.dec | 3 + > > 2 files changed, 159 insertions(+) > > create mode 100644 MdeModulePkg/Include/Ppi/NvmExpressPassThru.h > > > > diff --git a/MdeModulePkg/Include/Ppi/NvmExpressPassThru.h > > b/MdeModulePkg/Include/Ppi/NvmExpressPassThru.h > > new file mode 100644 > > index 0000000000..cb5b3b3b18 > > --- /dev/null > > +++ b/MdeModulePkg/Include/Ppi/NvmExpressPassThru.h > > @@ -0,0 +1,156 @@ > > +/** @file > > + > > + Copyright (c) 2019, Intel Corporation. All rights reserved.
> > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#ifndef _EDKII_NVME_PASS_THRU_PPI_H_ > > +#define _EDKII_NVME_PASS_THRU_PPI_H_ > > + > > +#include > > +#include > > + > > +/// > > +/// Global ID for the EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI. > > +/// > > +#define EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_GUID \ > > + { \ > > + 0x6af31b2c, 0x3be, 0x46c1, { 0xb1, 0x2d, 0xea, 0x4a, 0x36, 0xdf, = 0xa7, > > 0x4c } \ > > + } > > + > > +// > > +// Forward declaration for the > EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI. > > +// > > +typedef struct _EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI > > EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI; > > + > > +// > > +// Revision The revision to which the Nvme Pass Thru PPI interface > adheres. > > +// All future revisions must be backwards compatible. > > +// If a future version is not back wards compatible it is no= t the same > > GUID. > > +// > > +#define EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_REVISION > 0x00010000 > > + > > +/** > > + Gets the device path information of the underlying NVM Express host > > controller. > > + > > + @param[in] This The PPI instance pointer. > > + @param[out] DevicePathLength The length of the device path in b= ytes > > specified > > + by DevicePath. > > + @param[out] DevicePath The device path of the underlying = NVM > > Express > > + host controller. > > + This field re-uses EFI Device Path= Protocol as > > + defined by Section 10.2 EFI Device= Path Protocol > > + of UEFI 2.7 Specification. > > + > > + @retval EFI_SUCCESS The operation succeeds. > > + @retval EFI_INVALID_PARAMETER DevicePathLength or DevicePath is > > NULL. > > + @retval EFI_OUT_OF_RESOURCES The operation fails due to lack of > > resources. > > + > > +**/ > > +typedef > > +EFI_STATUS > > +(EFIAPI *EDKII_PEI_NVME_PASS_THRU_GET_DEVICE_PATH) ( > > + IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This, > > + OUT UINTN *DevicePathLength, > > + OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath > > + ); > > + > > +/** > > + Used to retrieve the next namespace ID for this NVM Express control= ler. > > + > > + If on input the value pointed to by NamespaceId is 0xFFFFFFFF, then= the > > first > > + valid namespace ID defined on the NVM Express controller is returne= d in > > the > > + location pointed to by NamespaceId and a status of EFI_SUCCESS is > > returned. > > + > > + If on input the value pointed to by NamespaceId is an invalid names= pace > > ID > > + other than 0xFFFFFFFF, then EFI_INVALID_PARAMETER is returned. > > + > > + If on input the value pointed to by NamespaceId is a valid namespac= e ID, > > then > > + the next valid namespace ID on the NVM Express controller is return= ed > in > > the > > + location pointed to by NamespaceId, and EFI_SUCCESS is returned. > > + > > + If the value pointed to by NamespaceId is the namespace ID of the l= ast > > + namespace on the NVM Express controller, then EFI_NOT_FOUND is > > returned. > > + > > + @param[in] This The PPI instance pointer. > > + @param[in,out] NamespaceId On input, a pointer to a legal > > NamespaceId > > + for an NVM Express namespace prese= nt on the > > + NVM Express controller. On output,= a pointer > > + to the next NamespaceId of an NVM = Express > > + namespace on an NVM Express contro= ller. An > > + input value of 0xFFFFFFFF retrieve= s the > > + first NamespaceId for an NVM Expre= ss > > + namespace present on an NVM Expres= s > > + controller. > > + > > + @retval EFI_SUCCESS The Namespace ID of the next Namespa= ce > was > > + returned. > > + @retval EFI_NOT_FOUND There are no more namespaces defined > on > > this > > + controller. > > + @retval EFI_INVALID_PARAMETER NamespaceId is an invalid value > other > > than > > + 0xFFFFFFFF. > > + > > +**/ > > +typedef > > +EFI_STATUS > > +(EFIAPI *EDKII_PEI_NVME_PASS_THRU_GET_NEXT_NAMESPACE)( > > + IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This, > > + IN OUT UINT32 *NamespaceId > > + ); > > + > > + > > +/** > > + Sends an NVM Express Command Packet to an NVM Express controller > or > > namespace. This function only > > + supports blocking execution of the command. > > + > > + @param[in] This The PPI instance pointer. > > + @param[in] NamespaceId Is a 32 bit Namespace ID to which = the > Nvm > > Express command packet will > > + be sent. > > + A Value of 0 denotes the NVM Expre= ss controller, a > Value > > of all 0FFh in > > + the namespace ID specifies that th= e command packet > > should be sent to all > > + valid namespaces. > > + @param[in,out] Packet A pointer to the EDKII PEI NVM Exp= ress > > PassThru Command Packet to send > > + to the NVMe namespace specified by= NamespaceId. > > + > > + @retval EFI_SUCCESS The EDKII PEI NVM Express Command > Packet > > was sent by the host. > > + TransferLength bytes were transfer= red to, or from > > DataBuffer. > > + @retval EFI_NOT_READY The EDKII PEI NVM Express Command > > Packet could not be sent because > > + the controller is not ready. The c= aller may retry again > later. > > + @retval EFI_DEVICE_ERROR A device error occurred while > attempting > > to send the EDKII PEI NVM > > + Express Command Packet. > > + @retval EFI_INVALID_PARAMETER Namespace, or the contents of > > EDKII_PEI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET > > + are invalid. > > + The EDKII PEI NVM Express Command = Packet was not > sent, > > so no > > + additional status information is a= vailable. > > + @retval EFI_UNSUPPORTED The command described by the EDKII > PEI > > NVM Express Command Packet > > + is not supported by the host adapt= er. > > + The EDKII PEI NVM Express Command = Packet was not > sent, > > so no > > + additional status information is a= vailable. > > + @retval EFI_TIMEOUT A timeout occurred while waiting f= or the > > EDKII PEI NVM Express Command > > + Packet to execute. > > + > > +**/ > > +typedef > > +EFI_STATUS > > +(EFIAPI *EDKII_PEI_NVME_PASS_THRU_PASSTHRU) ( > > + IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This, > > + IN UINT32 NamespaceI= d, > > + IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET > *Packet > > + ); > > + > > +// > > +// This PPI contains a set of services to send commands > > +// to a mass storage device. > > +// > > +struct _EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI { > > + UINT64 Revision; > > + EFI_NVM_EXPRESS_PASS_THRU_MODE *Mode; > > + EDKII_PEI_NVME_PASS_THRU_GET_DEVICE_PATH GetDevicePath; > > + EDKII_PEI_NVME_PASS_THRU_GET_NEXT_NAMESPACE > > GetNextNameSpace; > > + EDKII_PEI_NVME_PASS_THRU_PASSTHRU PassThru; > > +}; > > + > > +extern EFI_GUID gEdkiiPeiNvmExpressPassThruPpiGuid; > > + > > +#endif > > diff --git a/MdeModulePkg/MdeModulePkg.dec > > b/MdeModulePkg/MdeModulePkg.dec > > index 6cba729982..8ade6bac0e 100644 > > --- a/MdeModulePkg/MdeModulePkg.dec > > +++ b/MdeModulePkg/MdeModulePkg.dec > > @@ -466,6 +466,9 @@ > > ## Include/Ppi/Debug.h > > gEdkiiDebugPpiGuid =3D { 0x999e699c, 0xb013,= 0x475e, { 0xb1, > > 0x7b, 0xf3, 0xa8, 0xae, 0x5c, 0x48, 0x75 } } > > > > + ## Include/Ppi/NvmExpressPassThru.h > > + gEdkiiPeiNvmExpressPassThruPpiGuid =3D { 0x6af31b2c, 0x3be, 0x46= c1, > > { 0xb1, 0x2d, 0xea, 0x4a, 0x36, 0xdf, 0xa7, 0x4c } } > > + >=20 >=20 > Reviewed-by: Hao A Wu Thanks for the contribution. Pushed via commit 4128d8a8cb. Best Regards, Hao Wu >=20 > Best Regards, > Hao Wu >=20 >=20 > > [Protocols] > > ## Load File protocol provides capability to load and unload EFI im= age into > > memory and execute it. > > # Include/Protocol/LoadPe32Image.h > > -- > > 2.16.2.windows.1 >=20 >=20 >=20