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* [PATCHv2 0/3] Fix eMMC bus timing switch issue
@ 2019-09-26 14:27 Albecki, Mateusz
  2019-09-26 14:27 ` [PATCHv2 1/3] MdeModulePkg/SdMmcPciHcDxe: Remove clock stop from HS200 switch Albecki, Mateusz
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Albecki, Mateusz @ 2019-09-26 14:27 UTC (permalink / raw)
  To: devel; +Cc: Albecki, Mateusz, Hao A Wu, Marcin Wojtas

SD host controller specification section 3.9 recommends that controller's bus timing
should be switched after card's bus timing has been switched. In current eMMC
driver implementation every host controller switch has been done before call to
EmmcSwitchBusTiming which is causing issues on some eMMC controllers.

In HS200 switch sequence we removed stopping and starting the SD clock when
switching the host controller timing. Stopping the clock before bus timing
switch is only neccessary if preset value enable is set in host controller.
Current code doesn't check if this field is enabled or doesn't support
this feature for any other bus timing change so it has been removed.

Third patch fixes issue with switch to SdMmcMmcLegacy speed mode that was
introduced when we implemented v3 of override protocol. In new flow we allowed
EmmcSwitchToHighSpeed to be called with SdMmcMmcLegacy since all of the logic
in that function is ready to service this speed mode.

Tests performed on patch series v1:
- eMMC enumeration and OS boot in HS400
- eMMC enumeration and OS boot in HS200
- eMMC enumeration and OS boot in high speed SDR 8bit @52MHz

Tests have been performed on 2 eMMC host controllers. One that has been failing
with old driver and one that has been passing with old driver. Both controllers
pass all tests with multiple eMMC devices used.

Note: We were unable to test DDR speed mode because on test machines both new flow
and old flow was failing with this speed. I suspect it is a hardware problem.

Tests performed on patch series v2:
-eMMC enumeration and OS boot in backwards compatible legacy timing.

Performed on single host controller and 2 eMMC devices(Samsung and SanDisk)

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Marcin Wojtas <mw@semihalf.com>

Albecki, Mateusz (3):
  MdeModulePkg/SdMmcPciHcDxe: Remove clock stop and start from HS200
    switch
  MdeModulePkg/SdMmcPciHcDxe: Fix bus timing switch sequence
  MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcMmcLegacy bus timing handling

 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 107 ++++++++----------------
 1 file changed, 33 insertions(+), 74 deletions(-)

-- 
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^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-09-29  1:17 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-09-26 14:27 [PATCHv2 0/3] Fix eMMC bus timing switch issue Albecki, Mateusz
2019-09-26 14:27 ` [PATCHv2 1/3] MdeModulePkg/SdMmcPciHcDxe: Remove clock stop from HS200 switch Albecki, Mateusz
2019-09-26 14:27 ` [PATCHv2 2/3] MdeModulePkg/SdMmcPciHcDxe: Fix bus timing switch sequence Albecki, Mateusz
2019-09-26 14:27 ` [PATCHv2 3/3] MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcMmcLegacy bus timing handling Albecki, Mateusz
2019-09-27  2:49 ` [PATCHv2 0/3] Fix eMMC bus timing switch issue Wu, Hao A
2019-09-29  1:17   ` [edk2-devel] " Wu, Hao A

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