From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web09.26857.1574039135859490535 for ; Sun, 17 Nov 2019 17:05:36 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: hao.a.wu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Nov 2019 17:05:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,318,1569308400"; d="scan'208";a="405917823" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga005.fm.intel.com with ESMTP; 17 Nov 2019 17:05:35 -0800 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 17 Nov 2019 17:05:35 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 17 Nov 2019 17:05:28 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.127]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.2]) with mapi id 14.03.0439.000; Mon, 18 Nov 2019 09:05:27 +0800 From: "Wu, Hao A" To: "Ni, Ray" , "devel@edk2.groups.io" CC: "Gao, Liming" , "afish@apple.com" , "lersek@redhat.com" , "leif.lindholm@linaro.org" , "Kinney, Michael D" , Sean Brogan , "Wang, Jian J" Subject: Re: [PATCH v1] MdeModulePkg/NvmExpressDxe: Fix wrong queue size for async IO queues Thread-Topic: [PATCH v1] MdeModulePkg/NvmExpressDxe: Fix wrong queue size for async IO queues Thread-Index: AQHVmqiiEFZq7gW2lkqK6L/9GMrEdaeLDgiAgAUUQoA= Date: Mon, 18 Nov 2019 01:05:26 +0000 Message-ID: References: <20191114050141.18352-1-hao.a.wu@intel.com> <734D49CCEBEEF84792F5B80ED585239D5C35F832@SHSMSX104.ccr.corp.intel.com> In-Reply-To: <734D49CCEBEEF84792F5B80ED585239D5C35F832@SHSMSX104.ccr.corp.intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: hao.a.wu@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Ni, Ray > Sent: Friday, November 15, 2019 11:28 AM > To: Wu, Hao A; devel@edk2.groups.io > Cc: Sean Brogan; Wang, Jian J > Subject: RE: [PATCH v1] MdeModulePkg/NvmExpressDxe: Fix wrong queue size > for async IO queues >=20 > Acked-by: Ray Ni Hello all, I plan to push this bugfix to catch the upcoming stable tag. If there is concern on the patch, please help to raise. Thanks. Best Regards, Hao Wu >=20 > > -----Original Message----- > > From: Wu, Hao A > > Sent: Thursday, November 14, 2019 1:02 PM > > To: devel@edk2.groups.io > > Cc: Sean Brogan ; Wang, Jian J > > ; Ni, Ray ; Wu, Hao A > > > > Subject: [PATCH v1] MdeModulePkg/NvmExpressDxe: Fix wrong queue size > > for async IO queues > > > > From: Sean Brogan > > > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2118 > > > > When a packet is queued/completed for the asynchronous IO queue, the > > logic > > to roll over to the front of the queue doesn't account for actual size = of > > the IO Submission/Completion queue. > > > > This causes a device to hang due to doorbell being outside of visible > > queue. An example would be if an NVMe drive only supported a queue size > > of > > 128 while the driver supports 256. > > > > Cc: Jian J Wang > > Cc: Ray Ni > > Signed-off-by: Sean Brogan > > Signed-off-by: Hao A Wu > > --- > > MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c | 2 +- > > MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 6 ++++-- > > 2 files changed, 5 insertions(+), 3 deletions(-) > > > > diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c > > b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c > > index 3bde96bc95..62886d5c91 100644 > > --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c > > +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c > > @@ -672,7 +672,7 @@ ProcessAsyncTaskList ( > > } > > > > Private->CqHdbl[QueueId].Cqh++; > > - if (Private->CqHdbl[QueueId].Cqh > NVME_ASYNC_CCQ_SIZE) { > > + if (Private->CqHdbl[QueueId].Cqh > MIN (NVME_ASYNC_CCQ_SIZE, > > Private->Cap.Mqes)) { > > Private->CqHdbl[QueueId].Cqh =3D 0; > > Private->Pt[QueueId] ^=3D 1; > > } > > diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > > b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > > index 8e72137946..e9357b1239 100644 > > --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > > +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c > > @@ -452,6 +452,7 @@ NvmExpressPassThru ( > > NVME_SQ *Sq; > > NVME_CQ *Cq; > > UINT16 QueueId; > > + UINT16 QueueSize; > > UINT32 Bytes; > > UINT16 Offset; > > EFI_EVENT TimerEvent; > > @@ -540,6 +541,7 @@ NvmExpressPassThru ( > > Prp =3D NULL; > > TimerEvent =3D NULL; > > Status =3D EFI_SUCCESS; > > + QueueSize =3D MIN (NVME_ASYNC_CSQ_SIZE, Private->Cap.Mqes) + 1; > > > > if (Packet->QueueType =3D=3D NVME_ADMIN_QUEUE) { > > QueueId =3D 0; > > @@ -552,7 +554,7 @@ NvmExpressPassThru ( > > // > > // Submission queue full check. > > // > > - if ((Private->SqTdbl[QueueId].Sqt + 1) % (NVME_ASYNC_CSQ_SIZE + = 1) > > =3D=3D > > + if ((Private->SqTdbl[QueueId].Sqt + 1) % QueueSize =3D=3D > > Private->AsyncSqHead) { > > return EFI_NOT_READY; > > } > > @@ -701,7 +703,7 @@ NvmExpressPassThru ( > > // > > if ((Event !=3D NULL) && (QueueId !=3D 0)) { > > Private->SqTdbl[QueueId].Sqt =3D > > - (Private->SqTdbl[QueueId].Sqt + 1) % (NVME_ASYNC_CSQ_SIZE + 1); > > + (Private->SqTdbl[QueueId].Sqt + 1) % QueueSize; > > } else { > > Private->SqTdbl[QueueId].Sqt ^=3D 1; > > } > > -- > > 2.12.0.windows.1