From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web09.10173.1577252551444220947 for ; Tue, 24 Dec 2019 21:42:31 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: hao.a.wu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Dec 2019 21:42:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,353,1571727600"; d="scan'208";a="223356672" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga001.fm.intel.com with ESMTP; 24 Dec 2019 21:42:30 -0800 Received: from fmsmsx124.amr.corp.intel.com (10.18.125.39) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 24 Dec 2019 21:42:30 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx124.amr.corp.intel.com (10.18.125.39) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 24 Dec 2019 21:42:30 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.90]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.214]) with mapi id 14.03.0439.000; Wed, 25 Dec 2019 13:42:28 +0800 From: "Wu, Hao A" To: "Ni, Ray" , "devel@edk2.groups.io" CC: "Dong, Eric" , Laszlo Ersek , "Zeng, Star" , "Fu, Siyuan" , "Kinney, Michael D" Subject: Re: [PATCH v1 4/4] UefiCpuPkg/MpInitLib: Produce EDKII microcode patch HOB Thread-Topic: [PATCH v1 4/4] UefiCpuPkg/MpInitLib: Produce EDKII microcode patch HOB Thread-Index: AQHVufqozt/9YvmWW0u1Itm9Z6FvFqfIIZwAgAI0oOA= Date: Wed, 25 Dec 2019 05:42:27 +0000 Message-ID: References: <20191224013656.13404-1-hao.a.wu@intel.com> <20191224013656.13404-5-hao.a.wu@intel.com> <734D49CCEBEEF84792F5B80ED585239D5C3A9EB0@SHSMSX104.ccr.corp.intel.com> In-Reply-To: <734D49CCEBEEF84792F5B80ED585239D5C3A9EB0@SHSMSX104.ccr.corp.intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: hao.a.wu@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Ni, Ray > Sent: Tuesday, December 24, 2019 11:54 AM > To: Wu, Hao A; devel@edk2.groups.io > Cc: Dong, Eric; Laszlo Ersek; Zeng, Star; Fu, Siyuan; Kinney, Michael D > Subject: RE: [PATCH v1 4/4] UefiCpuPkg/MpInitLib: Produce EDKII microcode > patch HOB >=20 > MicrocodeDetect() is called in DXE phase as well. > But it doesn't use the new MicrocodePatch HOB to speed up the > microcode detection. Why? I found that within function MicrocodeDetect(), it has logic to check wheth= er a microcode patch has already been applied on a processor previously: if (CurrentRevision !=3D 0 && !IsBspCallIn) { // // Skip loading microcode if it has been loaded successfully // return; } My take is that if the microcode patch detection and application have been = done once in the PEI phase, the above check can ensure such process will not be repeated again in the DXE phase. Best Regards, Hao Wu >=20 > > -----Original Message----- > > From: Wu, Hao A > > Sent: Tuesday, December 24, 2019 9:37 AM > > To: devel@edk2.groups.io > > Cc: Wu, Hao A ; Dong, Eric ; N= i, > > Ray ; Laszlo Ersek ; Zeng, Star > > ; Fu, Siyuan ; Kinney, Michae= l > > D > > Subject: [PATCH v1 4/4] UefiCpuPkg/MpInitLib: Produce EDKII microcode > > patch HOB > > > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2430 > > > > This commit will update the MpInitLib to: > > > > A. Collect the base address and size information after microcode patche= s > > being loaded into memory; > > B. Collect the applied microcode patch for each processor within system= ; > > C. Based on the collected information, produce the EDKII microcode patc= h > > HOB. > > > > Cc: Eric Dong > > Cc: Ray Ni > > Cc: Laszlo Ersek > > Cc: Star Zeng > > Cc: Siyuan Fu > > Cc: Michael D Kinney > > Signed-off-by: Hao A Wu > > --- > > UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 1 + > > UefiCpuPkg/Library/MpInitLib/MpLib.h | 24 +++++++-- > > UefiCpuPkg/Library/MpInitLib/Microcode.c | 16 ++++-- > > UefiCpuPkg/Library/MpInitLib/MpLib.c | 8 ++- > > UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 55 +++++++++++++++++++= + > > 5 files changed, 96 insertions(+), 8 deletions(-) > > > > diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf > > b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf > > index 1538185ef9..326703cc9a 100644 > > --- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf > > +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf > > @@ -63,3 +63,4 @@ [Pcd] > > > > [Guids] > > gEdkiiS3SmmInitDoneGuid > > + gEdkiiMicrocodePatchHobGuid > > diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h > > b/UefiCpuPkg/Library/MpInitLib/MpLib.h > > index 56b0df664a..fb251d7aef 100644 > > --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h > > +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h > > @@ -138,6 +138,7 @@ typedef struct { > > EFI_EVENT WaitEvent; > > UINT32 ProcessorSignature; > > UINT8 PlatformId; > > + UINT64 MicrocodeData; > > } CPU_AP_DATA; > > > > // > > @@ -580,13 +581,15 @@ CheckAndUpdateApsStatus ( > > /** > > Detect whether specified processor can find matching microcode patch= and > > load it. > > > > - @param[in] CpuMpData The pointer to CPU MP Data structure. > > - @param[in] IsBspCallIn Indicate whether the caller is BSP or not. > > + @param[in] CpuMpData The pointer to CPU MP Data structure. > > + @param[in] ProcessorNumber The handle number of the processor. The > > range is > > + from 0 to the total number of logical p= rocessors > > + minus 1. > > **/ > > VOID > > MicrocodeDetect ( > > IN CPU_MP_DATA *CpuMpData, > > - IN BOOLEAN IsBspCallIn > > + IN UINTN ProcessorNumber > > ); > > > > /** > > @@ -619,5 +622,20 @@ EnableDebugAgent ( > > VOID > > ); > > > > +/** > > + Find the current Processor number by APIC ID. > > + > > + @param[in] CpuMpData Pointer to PEI CPU MP Data > > + @param[out] ProcessorNumber Return the pocessor number found > > + > > + @retval EFI_SUCCESS ProcessorNumber is found and returned. > > + @retval EFI_NOT_FOUND ProcessorNumber is not found. > > +**/ > > +EFI_STATUS > > +GetProcessorNumber ( > > + IN CPU_MP_DATA *CpuMpData, > > + OUT UINTN *ProcessorNumber > > + ); > > + > > #endif > > > > diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c > > b/UefiCpuPkg/Library/MpInitLib/Microcode.c > > index 68088b26a5..bbc40f81bf 100644 > > --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c > > +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c > > @@ -65,13 +65,15 @@ GetCurrentMicrocodeSignature ( > > It does not guarantee that the data has not been modified. > > CPU has its own mechanism to verify Microcode Binary part. > > > > - @param[in] CpuMpData The pointer to CPU MP Data structure. > > - @param[in] IsBspCallIn Indicate whether the caller is BSP or not. > > + @param[in] CpuMpData The pointer to CPU MP Data structure. > > + @param[in] ProcessorNumber The handle number of the processor. The > > range is > > + from 0 to the total number of logical p= rocessors > > + minus 1. > > **/ > > VOID > > MicrocodeDetect ( > > IN CPU_MP_DATA *CpuMpData, > > - IN BOOLEAN IsBspCallIn > > + IN UINTN ProcessorNumber > > ) > > { > > UINT32 ExtendedTableLength; > > @@ -93,6 +95,7 @@ MicrocodeDetect ( > > MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr; > > UINT32 ProcessorFlags; > > UINT32 ThreadId; > > + BOOLEAN IsBspCallIn; > > > > // > > // set ProcessorFlags to suppress incorrect compiler/analyzer warnin= gs > > @@ -107,6 +110,7 @@ MicrocodeDetect ( > > } > > > > CurrentRevision =3D GetCurrentMicrocodeSignature (); > > + IsBspCallIn =3D (ProcessorNumber =3D=3D (UINTN)CpuMpData->BspNum= ber) ? > > TRUE : FALSE; > > if (CurrentRevision !=3D 0 && !IsBspCallIn) { > > // > > // Skip loading microcode if it has been loaded successfully > > @@ -316,6 +320,12 @@ Done: > > DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does > > not match \ > > loaded microcode signature [0x%08x]\n", CurrentRevisio= n, > > LatestRevision)); > > ReleaseSpinLock(&CpuMpData->MpLock); > > + } else { > > + // > > + // Save the detected microcode patch address for each processor. > > + // It will be used when building the microcode patch cache HOB. > > + // > > + CpuMpData->CpuData[ProcessorNumber].MicrocodeData =3D (UINTN) > > MicrocodeData; > > } > > } > > > > diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c > > b/UefiCpuPkg/Library/MpInitLib/MpLib.c > > index 199468156b..8f4b2b1973 100644 > > --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c > > +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c > > @@ -399,12 +399,16 @@ ApInitializeSync ( > > ) > > { > > CPU_MP_DATA *CpuMpData; > > + UINTN ProcessorNumber; > > + EFI_STATUS Status; > > > > CpuMpData =3D (CPU_MP_DATA *) Buffer; > > + Status =3D GetProcessorNumber (CpuMpData, &ProcessorNumber); > > + ASSERT_EFI_ERROR (Status); > > // > > // Load microcode on AP > > // > > - MicrocodeDetect (CpuMpData, FALSE); > > + MicrocodeDetect (CpuMpData, ProcessorNumber); > > // > > // Sync BSP's MTRR table to AP > > // > > @@ -1765,7 +1769,7 @@ MpInitLibInitialize ( > > // > > // Detect and apply Microcode on BSP > > // > > - MicrocodeDetect (CpuMpData, TRUE); > > + MicrocodeDetect (CpuMpData, CpuMpData->BspNumber); > > > > // > > // Wakeup APs to do some AP initialize sync (Microcode & MTRR) > > diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c > > b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c > > index 3999603c3e..977818fda4 100644 > > --- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c > > +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c > > @@ -9,6 +9,7 @@ > > #include "MpLib.h" > > #include > > #include > > +#include > > > > /** > > S3 SMM Init Done notification function. > > @@ -291,6 +292,59 @@ CheckAndUpdateApsStatus ( > > } > > > > /** > > + Build the microcode patch HOB that contains the base address and siz= e of > > the > > + microcode patch stored in the memory. > > + > > + @param[in] CpuMpData Pointer to the CPU_MP_DATA structure. > > + > > +**/ > > +VOID > > +BuildMicrocodeCacheHob ( > > + IN CPU_MP_DATA *CpuMpData > > + ) > > +{ > > + EDKII_MICROCODE_PATCH_HOB *MicrocodeHob; > > + UINTN HobDataLength; > > + UINT32 Index; > > + > > + HobDataLength =3D sizeof (EDKII_MICROCODE_PATCH_HOB) + > > + sizeof (UINT64) * CpuMpData->CpuCount; > > + > > + MicrocodeHob =3D AllocatePool (HobDataLength); > > + if (MicrocodeHob =3D=3D NULL) { > > + ASSERT (FALSE); > > + return; > > + } > > + > > + // > > + // Store the information of the memory region that holds the microco= de > > patches. > > + // > > + MicrocodeHob->MicrocodePatchAddress =3D CpuMpData- > > >MicrocodePatchAddress; > > + MicrocodeHob->MicrocodePatchRegionSize =3D CpuMpData- > > >MicrocodePatchRegionSize; > > + > > + // > > + // Store the detected microcode patch for each processor as well. > > + // > > + MicrocodeHob->ProcessorNumber =3D CpuMpData->CpuCount; > > + for (Index =3D 0; Index < CpuMpData->CpuCount; Index++) { > > + if (CpuMpData->CpuData[Index].MicrocodeData !=3D 0) { > > + MicrocodeHob->DetectedPatchOffset[Index] =3D CpuMpData- > > >CpuData[Index].MicrocodeData - > > + CpuMpData->MicrocodeP= atchAddress; > > + } else { > > + MicrocodeHob->DetectedPatchOffset[Index] =3D MAX_UINT64; > > + } > > + } > > + > > + BuildGuidDataHob ( > > + &gEdkiiMicrocodePatchHobGuid, > > + MicrocodeHob, > > + HobDataLength > > + ); > > + > > + return; > > +} > > + > > +/** > > Initialize global data for MP support. > > > > @param[in] CpuMpData The pointer to CPU MP Data structure. > > @@ -303,6 +357,7 @@ InitMpGlobalData ( > > EFI_STATUS Status; > > > > SaveCpuMpData (CpuMpData); > > + BuildMicrocodeCacheHob (CpuMpData); > > > > /// > > /// Install Notify > > -- > > 2.12.0.windows.1