From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.1890.1580872584637445454 for ; Tue, 04 Feb 2020 19:16:24 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: hao.a.wu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Feb 2020 19:16:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,404,1574150400"; d="scan'208";a="342938755" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga001.fm.intel.com with ESMTP; 04 Feb 2020 19:16:24 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 4 Feb 2020 19:16:23 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.5]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.196]) with mapi id 14.03.0439.000; Wed, 5 Feb 2020 11:16:21 +0800 From: "Wu, Hao A" To: "devel@edk2.groups.io" , "Albecki, Mateusz" CC: Marcin Wojtas , "Gao, Zhichao" , "Gao, Liming" Subject: Re: [edk2-devel] [PATCH 3/4] MdeModulePkg/SdMmcPciHcDxe: Refactor data transfer completion Thread-Topic: [edk2-devel] [PATCH 3/4] MdeModulePkg/SdMmcPciHcDxe: Refactor data transfer completion Thread-Index: AQHV2pz1qgg/KUG2gEq9D5bfxCeEz6gKkcGg Date: Wed, 5 Feb 2020 03:16:20 +0000 Message-ID: References: <20200203141858.3236-1-mateusz.albecki@intel.com> <20200203141858.3236-4-mateusz.albecki@intel.com> In-Reply-To: <20200203141858.3236-4-mateusz.albecki@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: hao.a.wu@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Just a similar question to PATCH 2/4 below: > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Albecki, Mateusz > Sent: Monday, February 03, 2020 10:19 PM > To: devel@edk2.groups.io > Cc: Albecki, Mateusz; Wu, Hao A; Marcin Wojtas; Gao, Zhichao; Gao, Limin= g > Subject: [edk2-devel] [PATCH 3/4] MdeModulePkg/SdMmcPciHcDxe: > Refactor data transfer completion >=20 > This patch refactors the way in which the driver will check > the data transfer completion. Data transfer related > functionalities have been moved to separate function. >=20 > Cc: Hao A Wu > Cc: Marcin Wojtas > Cc: Zhichao Gao > Cc: Liming Gao >=20 > Signed-off-by: Mateusz Albecki > --- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 181 > ++++++++++++++--------- > 1 file changed, 112 insertions(+), 69 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > index 3dfaae8542..480a1664ea 100644 > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > @@ -2447,6 +2447,112 @@ SdMmcCheckCommandComplete ( > return EFI_NOT_READY; > } >=20 > +/** > + Update the SDMA address on the SDMA buffer boundary interrupt. > + > + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA > instance. > + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. > + > + @retval EFI_SUCCESS Updated SDMA buffer address. > + @retval Others Failed to update SDMA buffer address. > +**/ > +EFI_STATUS > +SdMmcUpdateSdmaAddress ( > + IN SD_MMC_HC_PRIVATE_DATA *Private, > + IN SD_MMC_HC_TRB *Trb > + ) > +{ > + UINT64 SdmaAddr; > + EFI_STATUS Status; > + > + SdmaAddr =3D SD_MMC_SDMA_ROUND_UP ((UINTN)Trb->DataPhy, > SD_MMC_SDMA_BOUNDARY); > + > + if (Private->ControllerVersion[Trb->Slot] >=3D SD_MMC_HC_CTRL_VER_400= ) > { > + Status =3D SdMmcHcRwMmio ( > + Private->PciIo, > + Trb->Slot, > + SD_MMC_HC_ADMA_SYS_ADDR, > + FALSE, > + sizeof (UINT64), > + &SdmaAddr > + ); > + } else { > + Status =3D SdMmcHcRwMmio ( > + Private->PciIo, > + Trb->Slot, > + SD_MMC_HC_SDMA_ADDR, > + FALSE, > + sizeof (UINT32), > + &SdmaAddr > + ); > + } > + > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + Trb->DataPhy =3D (UINT64)(UINTN)SdmaAddr; > + return EFI_SUCCESS; > +} > + > +/** > + Checks if the data transfer completed and performs any actions > + neccessary to continue the data transfer such as SDMA system > + address fixup or PIO data transfer. > + > + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA > instance. > + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. > + @param[in] IntStatus Snapshot of the normal interrupt status registe= r. > + > + @retval EFI_SUCCESS Data transfer completed successfully. > + @retval EFI_NOT_READY Data transfer completion still pending. > + @retval Others Data transfer failed to complete. > +**/ > +EFI_STATUS > +SdMmcCheckDataTransfer ( > + IN SD_MMC_HC_PRIVATE_DATA *Private, > + IN SD_MMC_HC_TRB *Trb, > + IN UINT16 IntStatus > + ) > +{ > + UINT16 Data16; > + EFI_STATUS Status; > + > + if ((IntStatus & BIT1) !=3D 0) { > + Data16 =3D BIT1; > + Status =3D SdMmcHcRwMmio ( > + Private->PciIo, > + Trb->Slot, > + SD_MMC_HC_NOR_INT_STS, > + FALSE, > + sizeof (Data16), > + &Data16 > + ); Cleaning the Transfer Complete (BIT1) right after checking it is more alig= ned with the spec, right? Best Regards, Hao Wu > + return Status; > + } > + > + if ((Trb->Mode =3D=3D SdMmcSdmaMode) && ((IntStatus & BIT3) !=3D 0)) = { > + Data16 =3D BIT3; > + Status =3D SdMmcHcRwMmio ( > + Private->PciIo, > + Trb->Slot, > + SD_MMC_HC_NOR_INT_STS, > + FALSE, > + sizeof (Data16), > + &Data16 > + ); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + Status =3D SdMmcUpdateSdmaAddress (Private, Trb); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + } > + > + return EFI_NOT_READY; > +} > + > /** > Check the TRB execution result. >=20 > @@ -2467,7 +2573,6 @@ SdMmcCheckTrbResult ( > EFI_STATUS Status; > EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; > UINT16 IntStatus; > - UINT64 SdmaAddr; > UINT32 PioLength; >=20 > Packet =3D Trb->Packet; > @@ -2530,80 +2635,18 @@ SdMmcCheckTrbResult ( > Status =3D SdMmcCheckCommandComplete (Private, Trb, IntStatus); > if (EFI_ERROR (Status)) { > goto Done; > - } else { > - // > - // If the command doesn't require data transfer skip the transfer > - // complete checking. > - // > - if ((Packet->SdMmcCmdBlk->CommandType !=3D > SdMmcCommandTypeAdtc) && > - (Packet->SdMmcCmdBlk->ResponseType !=3D SdMmcResponseTypeR1b) > && > - (Packet->SdMmcCmdBlk->ResponseType !=3D SdMmcResponseTypeR5b)= ) > { > - goto Done; > - } > } > } >=20 > - // > - // Check Transfer Complete bit is set or not. > - // > - if ((IntStatus & BIT1) =3D=3D BIT1) { > - goto Done; > - } > - > - // > - // Check if DMA interrupt is signalled for the SDMA transfer. > - // > - if ((Trb->Mode =3D=3D SdMmcSdmaMode) && ((IntStatus & BIT3) =3D=3D BI= T3)) { > - // > - // Clear DMA interrupt bit. > - // > - IntStatus =3D BIT3; > - Status =3D SdMmcHcRwMmio ( > - Private->PciIo, > - Trb->Slot, > - SD_MMC_HC_NOR_INT_STS, > - FALSE, > - sizeof (IntStatus), > - &IntStatus > - ); > - if (EFI_ERROR (Status)) { > - goto Done; > - } > - // > - // Update SDMA Address register. > - // > - SdmaAddr =3D SD_MMC_SDMA_ROUND_UP ((UINTN)Trb->DataPhy, > SD_MMC_SDMA_BOUNDARY); > - > - if (Private->ControllerVersion[Trb->Slot] >=3D SD_MMC_HC_CTRL_VER_4= 00) > { > - Status =3D SdMmcHcRwMmio ( > - Private->PciIo, > - Trb->Slot, > - SD_MMC_HC_ADMA_SYS_ADDR, > - FALSE, > - sizeof (UINT64), > - &SdmaAddr > - ); > - } else { > - Status =3D SdMmcHcRwMmio ( > - Private->PciIo, > - Trb->Slot, > - SD_MMC_HC_SDMA_ADDR, > - FALSE, > - sizeof (UINT32), > - &SdmaAddr > - ); > - } > - > - if (EFI_ERROR (Status)) { > - goto Done; > - } > - Trb->DataPhy =3D (UINT64)(UINTN)SdmaAddr; > + if (Packet->SdMmcCmdBlk->CommandType =3D=3D SdMmcCommandTypeAdtc > || > + Packet->SdMmcCmdBlk->ResponseType =3D=3D SdMmcResponseTypeR1b || > + Packet->SdMmcCmdBlk->ResponseType =3D=3D SdMmcResponseTypeR5b) { > + Status =3D SdMmcCheckDataTransfer (Private, Trb, IntStatus); > + } else { > + Status =3D EFI_SUCCESS; > } >=20 > - > - Status =3D EFI_NOT_READY; > Done: > - > if (Status !=3D EFI_NOT_READY) { > SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); > if (EFI_ERROR (Status)) { > -- > 2.14.1.windows.1 >=20 > -------------------------------------------------------------------- >=20 > Intel Technology Poland sp. z o.o. > ul. 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