From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web09.1730.1582682076675675777 for ; Tue, 25 Feb 2020 17:54:36 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: hao.a.wu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Feb 2020 17:54:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,486,1574150400"; d="scan'208";a="226555851" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga007.jf.intel.com with ESMTP; 25 Feb 2020 17:54:35 -0800 Received: from fmsmsx120.amr.corp.intel.com (10.18.124.208) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 25 Feb 2020 17:54:35 -0800 Received: from shsmsx108.ccr.corp.intel.com (10.239.4.97) by fmsmsx120.amr.corp.intel.com (10.18.124.208) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 25 Feb 2020 17:54:35 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.5]) by SHSMSX108.ccr.corp.intel.com ([169.254.8.98]) with mapi id 14.03.0439.000; Wed, 26 Feb 2020 09:54:33 +0800 From: "Wu, Hao A" To: Gaurav Jain , "devel@edk2.groups.io" CC: "Wang, Jian J" , "Ni, Ray" , "Ard Biesheuvel" , Pankaj Bansal Subject: Re: [PATCH v3 1/1] MdeModulePkg/Pci: Fixed Asserts in SCT PCIIO Protocol Test. Thread-Topic: [PATCH v3 1/1] MdeModulePkg/Pci: Fixed Asserts in SCT PCIIO Protocol Test. Thread-Index: AQHV66aW2jY/X1MOW0KTWXM7fPbRTKgstfWQ Date: Wed, 26 Feb 2020 01:54:33 +0000 Message-ID: References: <20200225120041.31570-1-gaurav.jain@nxp.com> In-Reply-To: <20200225120041.31570-1-gaurav.jain@nxp.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: hao.a.wu@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Gaurav Jain [mailto:gaurav.jain@nxp.com] > Sent: Tuesday, February 25, 2020 8:01 PM > To: devel@edk2.groups.io > Cc: Wang, Jian J; Wu, Hao A; Ni, Ray; Ard Biesheuvel; Pankaj Bansal; Gaur= av > Jain > Subject: [PATCH v3 1/1] MdeModulePkg/Pci: Fixed Asserts in SCT PCIIO > Protocol Test. >=20 > ASSERT in PollMem_Conf, CopyMem_Conf, SetBarAttributes_Conf > Conformance Test. > SCT Test expect return as Invalid Parameter or Unsupported. > Added Checks for Function Parameters. > return Invalid or Unsupported if Check fails. >=20 > Added Checks in PciIoPollIo(), PciIoIoRead() > PciIoIoWrite() >=20 > Signed-off-by: Gaurav Jain > --- >=20 > Notes: > v3 > - Corrected Width check in PciIoIoRead, PciIoIoWrite. > - Removed BarIndex check as it is already in GetBarResource(). > - Moved DEV_SUPPORTED_ATTRIBUTES Macro from > NonDiscoverablePciDeviceIo.c > to NonDiscoverablePciDeviceIo.h Reviewed-by: Hao A Wu I will push this patch *after* the upcoming edk2-stable202002 tag. Best Regards, Hao Wu >=20 > v2 > - Reverted ASSERT(FALSE) code. > - Added Checks for Width, BarIndex, Buffer, > Address range in PciIoIoRead, PciIoIoWrite. > - Added Checks for Width, BarIndex, Result, > Address range in PciIoPollIo, PciIoPollMem, > PciIoCopyMem. > - Added Checks for Attributes, BarIndex, > Address range in PciIoSetBarAttributes. >=20 > .../NonDiscoverablePciDeviceIo.c | 155 +++++++++++++++++- > .../NonDiscoverablePciDeviceIo.h | 3 + > 2 files changed, 155 insertions(+), 3 deletions(-) >=20 > diff --git > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverableP > ciDeviceIo.c > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverableP > ciDeviceIo.c > index 2d55c9699322..c3e83003a01c 100644 > --- > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverableP > ciDeviceIo.c > +++ > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverableP > ciDeviceIo.c > @@ -93,6 +93,31 @@ PciIoPollMem ( > OUT UINT64 *Result > ) > { > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc; > + UINTN Count; > + EFI_STATUS Status; > + > + if ((UINT32)Width > EfiPciIoWidthUint64) { > + return EFI_INVALID_PARAMETER; > + } > + > + if (Result =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + Count =3D 1; > + > + Status =3D GetBarResource (Dev, BarIndex, &Desc); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (Offset + (Count << (Width & 0x3)) > Desc->AddrLen) { > + return EFI_UNSUPPORTED; > + } > + > ASSERT (FALSE); > return EFI_UNSUPPORTED; > } > @@ -126,6 +151,31 @@ PciIoPollIo ( > OUT UINT64 *Result > ) > { > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc; > + UINTN Count; > + EFI_STATUS Status; > + > + if ((UINT32)Width > EfiPciIoWidthUint64) { > + return EFI_INVALID_PARAMETER; > + } > + > + if (Result =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + Count =3D 1; > + > + Status =3D GetBarResource (Dev, BarIndex, &Desc); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (Offset + (Count << (Width & 0x3)) > Desc->AddrLen) { > + return EFI_UNSUPPORTED; > + } > + > ASSERT (FALSE); > return EFI_UNSUPPORTED; > } > @@ -396,6 +446,29 @@ PciIoIoRead ( > IN OUT VOID *Buffer > ) > { > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc; > + EFI_STATUS Status; > + > + if ((UINT32)Width >=3D EfiPciIoWidthMaximum) { > + return EFI_INVALID_PARAMETER; > + } > + > + if (Buffer =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + > + Status =3D GetBarResource (Dev, BarIndex, &Desc); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (Offset + (Count << (Width & 0x3)) > Desc->AddrLen) { > + return EFI_UNSUPPORTED; > + } > + > ASSERT (FALSE); > return EFI_UNSUPPORTED; > } > @@ -425,6 +498,29 @@ PciIoIoWrite ( > IN OUT VOID *Buffer > ) > { > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc; > + EFI_STATUS Status; > + > + if ((UINT32)Width >=3D EfiPciIoWidthMaximum) { > + return EFI_INVALID_PARAMETER; > + } > + > + if (Buffer =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + > + Status =3D GetBarResource (Dev, BarIndex, &Desc); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (Offset + (Count << (Width & 0x3)) > Desc->AddrLen) { > + return EFI_UNSUPPORTED; > + } > + > ASSERT (FALSE); > return EFI_UNSUPPORTED; > } > @@ -556,6 +652,35 @@ PciIoCopyMem ( > IN UINTN Count > ) > { > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *DestDesc; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *SrcDesc; > + EFI_STATUS Status; > + > + if ((UINT32)Width > EfiPciIoWidthUint64) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + > + Status =3D GetBarResource (Dev, DestBarIndex, &DestDesc); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (DestOffset + (Count << (Width & 0x3)) > DestDesc->AddrLen) { > + return EFI_UNSUPPORTED; > + } > + > + Status =3D GetBarResource (Dev, SrcBarIndex, &SrcDesc); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (SrcOffset + (Count << (Width & 0x3)) > SrcDesc->AddrLen) { > + return EFI_UNSUPPORTED; > + } > + > ASSERT (FALSE); > return EFI_UNSUPPORTED; > } > @@ -1265,9 +1390,6 @@ PciIoAttributes ( > NON_DISCOVERABLE_PCI_DEVICE *Dev; > BOOLEAN Enable; >=20 > - #define DEV_SUPPORTED_ATTRIBUTES \ > - (EFI_PCI_DEVICE_ENABLE | > EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) > - > Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); >=20 > if ((Attributes & (~(DEV_SUPPORTED_ATTRIBUTES))) !=3D 0) { > @@ -1414,6 +1536,33 @@ PciIoSetBarAttributes ( > IN OUT UINT64 *Length > ) > { > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc; > + EFI_PCI_IO_PROTOCOL_WIDTH Width; > + UINTN Count; > + EFI_STATUS Status; > + > + if ((Attributes & (~DEV_SUPPORTED_ATTRIBUTES)) !=3D 0) { > + return EFI_UNSUPPORTED; > + } > + > + if (Offset =3D=3D NULL || Length =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + Width =3D EfiPciIoWidthUint8; > + Count =3D (UINT32) *Length; > + > + Status =3D GetBarResource(Dev, BarIndex, &Desc); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (*Offset + (Count << (Width & 0x3)) > Desc->AddrLen) { > + return EFI_UNSUPPORTED; > + } > + > ASSERT (FALSE); > return EFI_UNSUPPORTED; > } > diff --git > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverableP > ciDeviceIo.h > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverableP > ciDeviceIo.h > index 6511fbb13770..15541c281153 100644 > --- > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverableP > ciDeviceIo.h > +++ > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverableP > ciDeviceIo.h > @@ -30,6 +30,9 @@ > CR (PciIoPointer, NON_DISCOVERABLE_PCI_DEVICE, PciIo, \ > NON_DISCOVERABLE_PCI_DEVICE_SIG) >=20 > +#define DEV_SUPPORTED_ATTRIBUTES \ > + (EFI_PCI_DEVICE_ENABLE | > EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) > + > #define PCI_ID_VENDOR_UNKNOWN 0xffff > #define PCI_ID_DEVICE_DONTCARE 0x0000 >=20 > -- > 2.17.1