From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: rangasai.v.chaganty@intel.com) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by groups.io with SMTP; Fri, 17 May 2019 01:38:46 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 May 2019 01:38:46 -0700 X-ExtLoop1: 1 Received: from orsmsx105.amr.corp.intel.com ([10.22.225.132]) by orsmga001.jf.intel.com with ESMTP; 17 May 2019 01:38:46 -0700 Received: from orsmsx115.amr.corp.intel.com (10.22.240.11) by ORSMSX105.amr.corp.intel.com (10.22.225.132) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 17 May 2019 01:38:45 -0700 Received: from orsmsx107.amr.corp.intel.com ([169.254.1.194]) by ORSMSX115.amr.corp.intel.com ([169.254.4.95]) with mapi id 14.03.0415.000; Fri, 17 May 2019 01:38:45 -0700 From: "Chaganty, Rangasai V" To: "Chen, Marc W" , "devel@edk2.groups.io" CC: "Kubacki, Michael A" Subject: Re: [edk2-platform][PATCH v3] MinPlatformPkg: Add multiple segment support for PciHostBridgeLib Thread-Topic: [edk2-platform][PATCH v3] MinPlatformPkg: Add multiple segment support for PciHostBridgeLib Thread-Index: AQHVDIWIhkaP18my7EK0c3asrWd5VKZu/sDw Date: Fri, 17 May 2019 08:38:45 +0000 Message-ID: References: <20190517075242.56360-1-marc.w.chen@intel.com> In-Reply-To: <20190517075242.56360-1-marc.w.chen@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMTJiODU0MzYtNzE5NS00YzNiLWFkM2UtZGE4MGRiOTI1ZTdkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiMmdaYUdqUU1JZlRmSytkSHp0Y2NmNXJqSW54UWg4WEJuYlNMdHZDT0pZNUJiNE1DY2phMFZWMEd0bUU5elJpMSJ9 x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.138] MIME-Version: 1.0 Return-Path: rangasai.v.chaganty@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Rangasai V Chaganty =20 -----Original Message----- From: Chen, Marc W=20 Sent: Friday, May 17, 2019 12:53 AM To: devel@edk2.groups.io Cc: Chen, Marc W ; Kubacki, Michael A ; Chaganty, Rangasai V Subject: [edk2-platform][PATCH v3] MinPlatformPkg: Add multiple segment sup= port for PciHostBridgeLib REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D1799 1. Add PcdPciSegmentCount PCD in MinPlatformPkg.dec and set default to 1 2.= Base on PciHostBridge related PCDs to Initialize RootBridges. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marc Chen Cc: Michael Kubacki Cc: Sai Chaganty --- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 3 +- .../PciHostBridgeLibSimple.c | 83 ++++++++++++++----= ---- .../PciHostBridgeLibSimple.inf | 4 +- 3 files changed, 59 insertions(+), 31 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dec index 3185776ac3..e1ae8004cb 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -6,7 +6,7 @@ # INF files to generate AutoGen.c and AutoGen.h files # for the build inf= rastructure. # -# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights=20 +reserved.
# # This program and the accompanying materials are licensed and made availa= ble under # the terms and conditions of the BSD License which accompanies = this distribution. @@ -223,6 +223,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UIN= T32|0x90000019 gMinPlatformPkgTokenSpaceGuid.PcdPciDmaAbove4G |FALSE|BOOL= EAN|0x4001004B gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOL= EAN|0x4001004C gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOL= EAN|0x4001004D + gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount |0x1 |UI= NT8|0x4001004E =20 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16= |0x00010035 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16= |0x00010036 diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimp= le/PciHostBridgeLibSimple.c b/Platform/Intel/MinPlatformPkg/Pci/Library/Pci= HostBridgeLibSimple/PciHostBridgeLibSimple.c index 557ac2a5b3..25259e2f2d 100644 --- a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciH= ostBridgeLibSimple.c +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/P +++ ciHostBridgeLibSimple.c @@ -1,7 +1,7 @@ /** @file - SA PciHostBridge Library + PciHostBridge Library =20 -Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made availabl= e under the terms and conditions of the BSD License that accompanies this = distribution. The full text of the license may be found at @@ -15,6 +15,7 @@ WITHOUT WAR= RANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include #include #include +#include #include #include #include @@ -= 28,7 +29,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXP= RESS OR IMPLIED. GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTyp= eStr[] =3D { L"Mem", L"I/O", L"Bus" }; -ACPI_HID_DEVICE_PATH mRootBridgeDeviceNode =3D { +ACPI_HID_DEVICE_PATH mRootBridgeDeviceNodeTemplate =3D { { ACPI_DEVICE_PATH, ACPI_DP, @@ -41,7 +42,7 @@ ACPI_HID_DEVICE_PATH mRootBridgeDeviceNode =3D { 0 }; =20 -PCI_ROOT_BRIDGE mRootBridge =3D { +PCI_ROOT_BRIDGE mRootBridgeTemplate =3D { 0, EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | @@ -66,41 +67,67 @@ PCI_ROOT_BRIDGE mRootBridge =3D { NULL // DevicePath; }; =20 +/** + Return all the root bridge instances. + + @param Count Return the count of root bridge instances. + + @return All the root bridge instances, it will be NULL if system has ins= ufficient memory + resources available and count will be zero. +**/ + PCI_ROOT_BRIDGE * EFIAPI PciHostBridgeGetRootBridges ( UINTN *Count ) { - mRootBridge.Mem.Base =3D PcdGet32 (PcdPciReservedMemBase); + UINT8 Index; + PCI_ROOT_BRIDGE *RootBridge; + + RootBridge =3D AllocateZeroPool (sizeof (PCI_ROOT_BRIDGE) * PcdGet8=20 + (PcdPciSegmentCount)); if (RootBridge =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "PciHostBridge: Out of resource\n")); + *Count =3D 0; + return RootBridge; + } + + mRootBridgeTemplate.Mem.Base =3D PcdGet32 (PcdPciReservedMemBase); if (PcdGet32(PcdPciReservedMemLimit) !=3D 0) { - mRootBridge.Mem.Limit =3D PcdGet32 (PcdPciReservedMemLimit); + mRootBridgeTemplate.Mem.Limit =3D PcdGet32 (PcdPciReservedMemLimit); } else { - mRootBridge.Mem.Limit =3D (UINT32)PcdGet64 (PcdPciExpressBaseAddress); + mRootBridgeTemplate.Mem.Limit =3D (UINT32) PcdGet64=20 + (PcdPciExpressBaseAddress); } =20 - mRootBridge.MemAbove4G.Base =3D PcdGet64 (PcdPciReservedMemAbove4GBBase)= ; - mRootBridge.MemAbove4G.Limit =3D PcdGet64 (PcdPciReservedMemAbove4GBLimi= t); + mRootBridgeTemplate.MemAbove4G.Base =3D PcdGet64=20 + (PcdPciReservedMemAbove4GBBase); mRootBridgeTemplate.MemAbove4G.Limit=20 + =3D PcdGet64 (PcdPciReservedMemAbove4GBLimit); =20 - mRootBridge.PMem.Base =3D PcdGet32 (PcdPciReservedPMemBase); - mRootBridge.PMem.Limit =3D PcdGet32 (PcdPciReservedPMemLimit); - mRootBridge.PMemAbove4G.Base =3D PcdGet64 (PcdPciReservedPMemAbove4GBBas= e); - mRootBridge.PMemAbove4G.Limit =3D PcdGet64 (PcdPciReservedPMemAbove4GBLi= mit); + mRootBridgeTemplate.PMem.Base =3D PcdGet32 (PcdPciReservedPMemBase); =20 + mRootBridgeTemplate.PMem.Limit =3D PcdGet32 (PcdPciReservedPMemLimit); =20 + mRootBridgeTemplate.PMemAbove4G.Base =3D PcdGet64=20 + (PcdPciReservedPMemAbove4GBBase); =20 + mRootBridgeTemplate.PMemAbove4G.Limit =3D PcdGet64=20 + (PcdPciReservedPMemAbove4GBLimit); =20 - if (mRootBridge.MemAbove4G.Base < mRootBridge.MemAbove4G.Limit) { - mRootBridge.AllocationAttributes |=3D EFI_PCI_HOST_BRIDGE_MEM64_DECODE= ; + if (mRootBridgeTemplate.MemAbove4G.Base < mRootBridgeTemplate.MemAbove4G= .Limit) { + mRootBridgeTemplate.AllocationAttributes |=3D=20 + EFI_PCI_HOST_BRIDGE_MEM64_DECODE; } =20 - mRootBridge.Io.Base =3D PcdGet16 (PcdPciReservedIobase); - mRootBridge.Io.Limit =3D PcdGet16 (PcdPciReservedIoLimit); + mRootBridgeTemplate.Io.Base =3D PcdGet16 (PcdPciReservedIobase); =20 + mRootBridgeTemplate.Io.Limit =3D PcdGet16 (PcdPciReservedIoLimit); =20 - mRootBridge.DmaAbove4G =3D PcdGetBool (PcdPciDmaAbove4G); - mRootBridge.NoExtendedConfigSpace =3D PcdGetBool (PcdPciNoExtendedConfig= Space); - mRootBridge.ResourceAssigned =3D PcdGetBool (PcdPciResourceAssigned); + mRootBridgeTemplate.DmaAbove4G =3D PcdGetBool (PcdPciDmaAbove4G); =20 + mRootBridgeTemplate.NoExtendedConfigSpace =3D PcdGetBool=20 + (PcdPciNoExtendedConfigSpace); mRootBridgeTemplate.ResourceAssigned =3D= =20 + PcdGetBool (PcdPciResourceAssigned); + + for (Index =3D 0; Index < PcdGet8 (PcdPciSegmentCount); Index ++) { + mRootBridgeDeviceNodeTemplate.UID =3D Index; + mRootBridgeTemplate.Segment =3D Index; + mRootBridgeTemplate.DevicePath =3D NULL; + mRootBridgeTemplate.DevicePath =3D AppendDevicePathNode (NULL, &mRootB= ridgeDeviceNodeTemplate.Header); + CopyMem (RootBridge + Index, &mRootBridgeTemplate, sizeof=20 + (PCI_ROOT_BRIDGE)); } =20 - mRootBridge.DevicePath =3D AppendDevicePathNode (NULL, &mRootBridgeDevic= eNode.Header); - *Count =3D 1; - return &mRootBridge; + *Count =3D PcdGet8 (PcdPciSegmentCount); return RootBridge; } =20 VOID @@ -110,7 +137,7 @@ PciHostBridgeFreeRootBridges ( UINTN Count ) { - ASSERT (Count =3D=3D 1); + ASSERT (Count <=3D PcdGet8 (PcdPciSegmentCount)); FreePool (Bridges->DevicePath); } =20 @@ -136,20 +163,20 @@ PciHostBridgeResourceConflict ( { EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor; UINTN RootBridgeIndex; - DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n")); + DEBUG ((DEBUG_ERROR, "PciHostBridge: Resource conflict happens!\n")); =20 RootBridgeIndex =3D 0; Descriptor =3D (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration; while (Descriptor->Desc =3D=3D ACPI_ADDRESS_SPACE_DESCRIPTOR) { - DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++)); + DEBUG ((DEBUG_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++)); for (; Descriptor->Desc =3D=3D ACPI_ADDRESS_SPACE_DESCRIPTOR; Descript= or++) { ASSERT (Descriptor->ResType < sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) / sizeof (= mPciHostBridgeLibAcpiAddressSpaceTypeStr[0]) ); - DEBUG ((EFI_D_ERROR, " %s: Length/Alignment =3D 0x%lx / 0x%lx\n", + DEBUG ((DEBUG_ERROR, " %s: Length/Alignment =3D 0x%lx / 0x%lx\n", mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType= ], Descriptor->AddrLen, Descriptor->AddrRangeMax)); if (Descriptor->ResType =3D=3D ACPI_ADDRESS_SPACE_TYPE_MEM) { - DEBUG ((EFI_D_ERROR, " Granularity/SpecificFlag =3D %ld / %02x= %s\n", + DEBUG ((DEBUG_ERROR, " Granularity/SpecificFlag =3D %ld / %02x= %s\n", Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag= , ((Descriptor->SpecificFlag & EFI_ACPI_MEMORY_RESOURCE_SPEC= IFIC_FLAG_CACHEABLE_PREFETCHABLE) !=3D 0) ? L" (Prefetchable)" : L"" )); diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimp= le/PciHostBridgeLibSimple.inf b/Platform/Intel/MinPlatformPkg/Pci/Library/P= ciHostBridgeLibSimple/PciHostBridgeLibSimple.inf index f9a769155b..b37488e512 100644 --- a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciH= ostBridgeLibSimple.inf +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciH= ostBridgeLibSimple.inf @@ -1,7 +1,7 @@ ## @file # Component description file for the SA PciHostBridge library # -# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
# # This program and the accompanying materials are licensed and made availa= ble under # the terms and conditions of the BSD License which accompanies this distr= ibution. @@ -56,4 +56,4 @@ gMinPlatformPkgTokenSpaceGuid.PcdPciDmaAbove4G gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned - + gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount --=20 2.16.2.windows.1