From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.93, mailfrom: rangasai.v.chaganty@intel.com) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by groups.io with SMTP; Tue, 11 Jun 2019 01:46:43 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Jun 2019 01:46:43 -0700 X-ExtLoop1: 1 Received: from orsmsx110.amr.corp.intel.com ([10.22.240.8]) by orsmga008.jf.intel.com with ESMTP; 11 Jun 2019 01:46:43 -0700 Received: from orsmsx107.amr.corp.intel.com ([169.254.1.123]) by ORSMSX110.amr.corp.intel.com ([169.254.10.60]) with mapi id 14.03.0415.000; Tue, 11 Jun 2019 01:46:42 -0700 From: "Chaganty, Rangasai V" To: "Gao, Liming" , "devel@edk2.groups.io" CC: "Kinney, Michael D" , "Ni, Ray" Subject: Re: [edk2-platform patch 0/2] Import IntelSiliconPkg from edk2 repo master Thread-Topic: [edk2-platform patch 0/2] Import IntelSiliconPkg from edk2 repo master Thread-Index: AQHVH6JRI3VVd1DKwUG4OBTpsVBM5KaWJK0A Date: Tue, 11 Jun 2019 08:46:42 +0000 Message-ID: References: <20190610153627.16864-1-liming.gao@intel.com> In-Reply-To: <20190610153627.16864-1-liming.gao@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYzcxOTBjYTAtYzQ3MS00ZWNkLWJjMTgtOWZjYTA0ODQ0NDFlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiaUxuT2syWUtVdHJnaGp4R0VIaUtCUnBicVVvOW8wUXBiYnVHTVozSGR0NkVZeXlrMnhEZm1lR1prTHBLSXFMbiJ9 x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.138] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Sai Chaganty =20 -----Original Message----- From: Gao, Liming=20 Sent: Monday, June 10, 2019 8:36 AM To: devel@edk2.groups.io Cc: Kinney, Michael D ; Ni, Ray ; Chaganty, Rangasai V Subject: [edk2-platform patch 0/2] Import IntelSiliconPkg from edk2 repo ma= ster BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1890 IntelSiliconPkg is moved into Silicon/Intel directory. Cc: Michael D Kinney Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Liming Gao Liming Gao (2): Silicon/Intel: Import IntelSiliconPkg from edk2 repo master Maintainers.txt: Add Maintainers for new added IntelSiliconPkg .../MicrocodeFlashAccessLibNull.c | 36 + .../Capsule/MicrocodeUpdateDxe/MicrocodeFmp.c | 979 +++++++++++++++ .../Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.c | 1326 ++++++++++++++++= ++++ .../Feature/VTd/IntelVTdDxe/BmDma.c | 538 ++++++++ .../Feature/VTd/IntelVTdDxe/DmaProtection.c | 683 ++++++++++ .../Feature/VTd/IntelVTdDxe/DmarAcpiTable.c | 890 +++++++++++++ .../Feature/VTd/IntelVTdDxe/IntelVTdDxe.c | 400 ++++++ .../Feature/VTd/IntelVTdDxe/PciInfo.c | 373 ++++++ .../Feature/VTd/IntelVTdDxe/TranslationTable.c | 1026 +++++++++++++++ .../Feature/VTd/IntelVTdDxe/TranslationTableEx.c | 152 +++ .../Feature/VTd/IntelVTdDxe/VtdReg.c | 561 +++++++++ .../Feature/VTd/IntelVTdPmrPei/DmarTable.c | 578 +++++++++ .../Feature/VTd/IntelVTdPmrPei/IntelVTdPmr.c | 420 +++++++ .../Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c | 810 ++++++++++++ .../Feature/VTd/IntelVTdPmrPei/VtdReg.c | 287 +++++ .../PlatformVTdInfoSamplePei.c | 361 ++++++ .../PlatformVTdSampleDxe/PlatformVTdSampleDxe.c | 407 ++++++ .../DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.c | 81 ++ Maintainers.txt | 4 + .../MicrocodeFlashAccessLibNull.inf | 34 + .../MicrocodeFlashAccessLibNull.uni | 16 + .../MicrocodeCapsulePdb/MicrocodeCapsulePdb.dsc | 27 + .../MicrocodeCapsulePdb/MicrocodeCapsulePdb.fdf | 26 + .../Feature/Capsule/MicrocodeCapsulePdb/Readme.md | 20 + .../MicrocodeCapsuleTxt/Microcode/Microcode.inf | 21 + .../MicrocodeCapsuleTxt/MicrocodeCapsuleTxt.dsc | 33 + .../MicrocodeCapsuleTxt/MicrocodeCapsuleTxt.fdf | 26 + .../Feature/Capsule/MicrocodeCapsuleTxt/Readme.md | 33 + .../Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.h | 499 ++++++++ .../MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf | 67 + .../MicrocodeUpdateDxe/MicrocodeUpdateDxe.uni | 15 + .../MicrocodeUpdateDxe/MicrocodeUpdateDxeExtra.uni | 14 + .../Feature/VTd/IntelVTdDxe/DmaProtection.h | 632 ++++++++++ .../Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf | 83 ++ .../Feature/VTd/IntelVTdDxe/IntelVTdDxe.uni | 14 + .../Feature/VTd/IntelVTdDxe/IntelVTdDxeExtra.uni | 14 + .../Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.h | 159 +++ .../Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf | 60 + .../Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.uni | 14 + .../VTd/IntelVTdPmrPei/IntelVTdPmrPeiExtra.uni | 14 + .../PlatformVTdInfoSamplePei.inf | 48 + .../PlatformVTdInfoSamplePei.uni | 14 + .../PlatformVTdInfoSamplePeiExtra.uni | 14 + .../PlatformVTdSampleDxe/PlatformVTdSampleDxe.inf | 56 + .../PlatformVTdSampleDxe/PlatformVTdSampleDxe.uni | 14 + .../PlatformVTdSampleDxeExtra.uni | 14 + .../IntelSiliconPkg/Include/Guid/MicrocodeFmp.h | 15 + .../IndustryStandard/FirmwareInterfaceTable.h | 69 + .../Include/IndustryStandard/FirmwareVersionInfo.h | 54 + .../Include/IndustryStandard/IgdOpRegion.h | 149 +++ .../IntelSiliconPkg/Include/IndustryStandard/Vtd.h | 355 ++++++ .../Include/Library/MicrocodeFlashAccessLib.h | 33 + .../Intel/IntelSiliconPkg/Include/Ppi/VtdInfo.h | 37 + .../Include/Protocol/PlatformVtdPolicy.h | 143 +++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 80 ++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 86 ++ .../DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf | 38 + 57 files changed, 12952 insertions(+) create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Library/M= icrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= UpdateDxe/MicrocodeFmp.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= UpdateDxe/MicrocodeUpdate.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/B= mDma.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/D= maProtection.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/D= marAcpiTable.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/I= ntelVTdDxe.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/P= ciInfo.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/T= ranslationTable.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/T= ranslationTableEx.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/V= tdReg.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPe= i/DmarTable.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPe= i/IntelVTdPmr.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPe= i/IntelVTdPmrPei.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPe= i/VtdReg.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdIn= foSamplePei/PlatformVTdInfoSamplePei.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdSa= mpleDxe/PlatformVTdSampleDxe.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/DxeSmbiosDataHobL= ib/DxeSmbiosDataHobLib.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Library/M= icrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Library/M= icrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= CapsulePdb/MicrocodeCapsulePdb.dsc create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= CapsulePdb/MicrocodeCapsulePdb.fdf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= CapsulePdb/Readme.md create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= CapsuleTxt/Microcode/Microcode.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= CapsuleTxt/MicrocodeCapsuleTxt.dsc create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= CapsuleTxt/MicrocodeCapsuleTxt.fdf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= CapsuleTxt/Readme.md create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= UpdateDxe/MicrocodeUpdate.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= UpdateDxe/MicrocodeUpdateDxe.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= UpdateDxe/MicrocodeUpdateDxe.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Microcode= UpdateDxe/MicrocodeUpdateDxeExtra.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/D= maProtection.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/I= ntelVTdDxe.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/I= ntelVTdDxe.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/I= ntelVTdDxeExtra.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPe= i/IntelVTdPmrPei.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPe= i/IntelVTdPmrPei.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPe= i/IntelVTdPmrPei.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPe= i/IntelVTdPmrPeiExtra.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdIn= foSamplePei/PlatformVTdInfoSamplePei.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdIn= foSamplePei/PlatformVTdInfoSamplePei.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdIn= foSamplePei/PlatformVTdInfoSamplePeiExtra.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdSa= mpleDxe/PlatformVTdSampleDxe.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdSa= mpleDxe/PlatformVTdSampleDxe.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdSa= mpleDxe/PlatformVTdSampleDxeExtra.uni create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Guid/MicrocodeFmp= .h create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/= FirmwareInterfaceTable.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/= FirmwareVersionInfo.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/= IgdOpRegion.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/= Vtd.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Library/Microcode= FlashAccessLib.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Ppi/VtdInfo.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Protocol/Platform= VtdPolicy.h create mode 100644 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec create mode 100644 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/DxeSmbiosDataHobL= ib/DxeSmbiosDataHobLib.inf --=20 2.13.0.windows.1