* [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
@ 2019-10-02 7:36 Nate DeSimone
2019-10-02 18:41 ` Chaganty, Rangasai V
2019-10-03 1:23 ` Kubacki, Michael A
0 siblings, 2 replies; 3+ messages in thread
From: Nate DeSimone @ 2019-10-02 7:36 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Michael Kubacki, Sai Chaganty
Current ASSERT logic checks that the EISS bit is still
set after we clear it. This is incorrect, it should be
checking that that the EISS bit is clear after we clear it.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
index aadc367a9f..5fb667dc4a 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
@@ -184,7 +184,7 @@ DisableBiosWriteProtect (
B_PCH_SPI_BC_WPD
);
- ASSERT ((PciSegmentRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);
+ ASSERT ((MmioRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0);
return EFI_SUCCESS;
}
--
2.23.0.windows.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
2019-10-02 7:36 [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT Nate DeSimone
@ 2019-10-02 18:41 ` Chaganty, Rangasai V
2019-10-03 1:23 ` Kubacki, Michael A
1 sibling, 0 replies; 3+ messages in thread
From: Chaganty, Rangasai V @ 2019-10-02 18:41 UTC (permalink / raw)
To: Desimone, Nathaniel L, devel@edk2.groups.io
Cc: Chiu, Chasel, Kubacki, Michael A
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
-----Original Message-----
From: Desimone, Nathaniel L
Sent: Wednesday, October 02, 2019 12:36 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A <michael.a.kubacki@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
Current ASSERT logic checks that the EISS bit is still set after we clear it. This is incorrect, it should be checking that that the EISS bit is clear after we clear it.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
index aadc367a9f..5fb667dc4a 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
@@ -184,7 +184,7 @@ DisableBiosWriteProtect (
B_PCH_SPI_BC_WPD ); - ASSERT ((PciSegmentRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);+ ASSERT ((MmioRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0); return EFI_SUCCESS; }--
2.23.0.windows.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
2019-10-02 7:36 [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT Nate DeSimone
2019-10-02 18:41 ` Chaganty, Rangasai V
@ 2019-10-03 1:23 ` Kubacki, Michael A
1 sibling, 0 replies; 3+ messages in thread
From: Kubacki, Michael A @ 2019-10-03 1:23 UTC (permalink / raw)
To: Desimone, Nathaniel L, devel@edk2.groups.io
Cc: Chiu, Chasel, Chaganty, Rangasai V
Please change MmioRead8 () to PciSegmentRead8 () since the address is derived from PCI_SEGMENT_LIB_ADDRESS ().
> -----Original Message-----
> From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
> Sent: Wednesday, October 2, 2019 12:36 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A
> <michael.a.kubacki@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>
> Subject: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS
> bit ASSERT
>
> Current ASSERT logic checks that the EISS bit is still set after we clear it. This is
> incorrect, it should be checking that that the EISS bit is clear after we clear it.
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Michael Kubacki <michael.a.kubacki@intel.com>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
> .../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> index aadc367a9f..5fb667dc4a 100644
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> @@ -184,7 +184,7 @@ DisableBiosWriteProtect (
> B_PCH_SPI_BC_WPD ); - ASSERT ((PciSegmentRead8 (SpiBaseAddress +
> R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);+ ASSERT ((MmioRead8
> (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0); return
> EFI_SUCCESS; }--
> 2.23.0.windows.1
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-10-02 7:36 [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT Nate DeSimone
2019-10-02 18:41 ` Chaganty, Rangasai V
2019-10-03 1:23 ` Kubacki, Michael A
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