* Re: [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
2019-10-04 20:14 [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT Nate DeSimone
@ 2019-10-04 21:16 ` Kubacki, Michael A
2019-10-05 0:09 ` Chaganty, Rangasai V
2019-10-08 4:12 ` [edk2-devel] " Chiu, Chasel
2 siblings, 0 replies; 4+ messages in thread
From: Kubacki, Michael A @ 2019-10-04 21:16 UTC (permalink / raw)
To: Desimone, Nathaniel L, devel@edk2.groups.io
Cc: Chiu, Chasel, Chaganty, Rangasai V
Reviewed-by: Michael Kubacki <michael.a.kubacki@intel.com>
> -----Original Message-----
> From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
> Sent: Friday, October 4, 2019 1:14 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A
> <michael.a.kubacki@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>
> Subject: [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic Error in EISS
> bit ASSERT
>
> Current ASSERT logic checks that the EISS bit is still set after we clear it. This is
> incorrect, it should be checking that that the EISS bit is clear after we clear it.
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Michael Kubacki <michael.a.kubacki@intel.com>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
> .../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> index aadc367a9f..c34c378de2 100644
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> @@ -184,7 +184,7 @@ DisableBiosWriteProtect (
> B_PCH_SPI_BC_WPD ); - ASSERT ((PciSegmentRead8 (SpiBaseAddress +
> R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);+ ASSERT ((PciSegmentRead8
> (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0); return
> EFI_SUCCESS; }--
> 2.23.0.windows.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
2019-10-04 20:14 [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT Nate DeSimone
2019-10-04 21:16 ` Kubacki, Michael A
@ 2019-10-05 0:09 ` Chaganty, Rangasai V
2019-10-08 4:12 ` [edk2-devel] " Chiu, Chasel
2 siblings, 0 replies; 4+ messages in thread
From: Chaganty, Rangasai V @ 2019-10-05 0:09 UTC (permalink / raw)
To: Desimone, Nathaniel L, devel@edk2.groups.io
Cc: Chiu, Chasel, Kubacki, Michael A
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
-----Original Message-----
From: Desimone, Nathaniel L
Sent: Friday, October 04, 2019 1:14 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A <michael.a.kubacki@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
Current ASSERT logic checks that the EISS bit is still set after we clear it. This is incorrect, it should be checking that that the EISS bit is clear after we clear it.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
index aadc367a9f..c34c378de2 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
@@ -184,7 +184,7 @@ DisableBiosWriteProtect (
B_PCH_SPI_BC_WPD ); - ASSERT ((PciSegmentRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);+ ASSERT ((PciSegmentRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0); return EFI_SUCCESS; }--
2.23.0.windows.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [edk2-devel] [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
2019-10-04 20:14 [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT Nate DeSimone
2019-10-04 21:16 ` Kubacki, Michael A
2019-10-05 0:09 ` Chaganty, Rangasai V
@ 2019-10-08 4:12 ` Chiu, Chasel
2 siblings, 0 replies; 4+ messages in thread
From: Chiu, Chasel @ 2019-10-08 4:12 UTC (permalink / raw)
To: devel@edk2.groups.io, Desimone, Nathaniel L
Cc: Kubacki, Michael A, Chaganty, Rangasai V
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate
> DeSimone
> Sent: Saturday, October 5, 2019 4:14 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A
> <michael.a.kubacki@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>
> Subject: [edk2-devel] [edk2-platforms] [PATCH V2] KabylakeSiliconPkg: Logic
> Error in EISS bit ASSERT
>
> Current ASSERT logic checks that the EISS bit is still set after we clear it. This
> is incorrect, it should be checking that that the EISS bit is clear after we clear
> it.
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Michael Kubacki <michael.a.kubacki@intel.com>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
> .../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> index aadc367a9f..c34c378de2 100644
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> @@ -184,7 +184,7 @@ DisableBiosWriteProtect (
> B_PCH_SPI_BC_WPD ); - ASSERT ((PciSegmentRead8
> (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);+ ASSERT
> ((PciSegmentRead8 (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS)
> == 0); return EFI_SUCCESS; }--
> 2.23.0.windows.1
>
>
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^ permalink raw reply [flat|nested] 4+ messages in thread