From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.126; helo=mga18.intel.com; envelope-from=qin.long@intel.com; receiver=edk2-devel@lists.01.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9A60320988476 for ; Mon, 16 Jul 2018 01:02:26 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Jul 2018 01:02:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,360,1526367600"; d="scan'208";a="246023173" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga006.fm.intel.com with ESMTP; 16 Jul 2018 01:01:44 -0700 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 16 Jul 2018 01:01:43 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 16 Jul 2018 01:01:43 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.100]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.17]) with mapi id 14.03.0319.002; Mon, 16 Jul 2018 16:01:39 +0800 From: "Long, Qin" To: "Zhang, Chao B" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Zhang, Chao B" Thread-Topic: [edk2] [Patch] SecurityPkg:Tcg: Fix comment typos Thread-Index: AQHUHNWZSZ2HTyg4C0KdQdlDRFlob6SRfFWA Date: Mon, 16 Jul 2018 08:01:40 +0000 Message-ID: References: <20180716072039.27660-1-chao.b.zhang@intel.com> In-Reply-To: <20180716072039.27660-1-chao.b.zhang@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch] SecurityPkg:Tcg: Fix comment typos X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 16 Jul 2018 08:02:26 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Long Qin (BTW: Please remove the extra "Signed-off-by" signature) Best Regards & Thanks, LONG, Qin > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Zhang, Chao B > Sent: Monday, July 16, 2018 3:21 PM > To: edk2-devel@lists.01.org > Cc: Long Qin ; Yao, Jiewen ; > Zhang, Chao B > Subject: [edk2] [Patch] SecurityPkg:Tcg: Fix comment typos >=20 > "Triggle" is a typo. Fix it with "Trigger" >=20 > Cc: Long Qin > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Chao Zhang > Signed-off-by: Zhang, Chao B > --- > SecurityPkg/Tcg/Tcg2Smm/Tpm.asl | 16 ++++++++-------- > SecurityPkg/Tcg/TcgSmm/Tpm.asl | 16 ++++++++-------- > 2 files changed, 16 insertions(+), 16 deletions(-) >=20 > diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl > b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl index 50dea0ab9a..471b6b1fa1 100644 > --- a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl > +++ b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl > @@ -257,16 +257,16 @@ DefinitionBlock ( > // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect. > // > If (LNot (And (MORD, 0x10))) > { > // > - // Triggle the SMI through ACPI _PTS method. > + // Trigger the SMI through ACPI _PTS method. > // > Store (0x02, MCIP) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (MCIN, IOB2) > } > } > Return (0) > @@ -363,11 +363,11 @@ DefinitionBlock ( > Store (DerefOf (Index (Arg2, 0x00)), PPRQ) > Store (0, PPRM) > Store (0x02, PPIP) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (PPIN, IOB2) > Return (FRET) >=20 >=20 > @@ -394,11 +394,11 @@ DefinitionBlock ( > // e) Return TPM Operation Response to OS Environment > // > Store (0x05, PPIP) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (PPIN, IOB2) >=20 > Store (LPPR, Index (TPM3, 0x01)) > Store (PPRP, Index (TPM3, 0x02)) @@ -426,11 +426,11 @@ > DefinitionBlock ( > If (LEqual (PPRQ, 23)) { > Store (DerefOf (Index (Arg2, 0x01)), PPRM) > } >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (PPIN, IOB2) > Return (FRET) > } > Case (8) > @@ -440,11 +440,11 @@ DefinitionBlock ( > // > Store (8, PPIP) > Store (DerefOf (Index (Arg2, 0x00)), UCRQ) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (PPIN, IOB2) >=20 > Return (FRET) > } > @@ -474,16 +474,16 @@ DefinitionBlock ( > // Save the Operation Value of the Request to MORD (reserved > memory) > // > Store (DerefOf (Index (Arg2, 0x00)), MORD) >=20 > // > - // Triggle the SMI through ACPI _DSM method. > + // Trigger the SMI through ACPI _DSM method. > // > Store (0x01, MCIP) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (MCIN, IOB2) > Return (MRET) > } > Default {BreakPoint} > diff --git a/SecurityPkg/Tcg/TcgSmm/Tpm.asl > b/SecurityPkg/Tcg/TcgSmm/Tpm.asl index 12f24f3996..2114283b45 100644 > --- a/SecurityPkg/Tcg/TcgSmm/Tpm.asl > +++ b/SecurityPkg/Tcg/TcgSmm/Tpm.asl > @@ -93,16 +93,16 @@ DefinitionBlock ( > // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect. > // > If (LNot (And (MORD, 0x10))) > { > // > - // Triggle the SMI through ACPI _PTS method. > + // Trigger the SMI through ACPI _PTS method. > // > Store (0x02, MCIP) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (MCIN, IOB2) > } > } > Return (0) > @@ -198,11 +198,11 @@ DefinitionBlock ( >=20 > Store (DerefOf (Index (Arg2, 0x00)), PPRQ) > Store (0x02, PPIP) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (PPIN, IOB2) > Return (FRET) >=20 >=20 > @@ -229,11 +229,11 @@ DefinitionBlock ( > // e) Return TPM Operation Response to OS Environment > // > Store (0x05, PPIP) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (PPIN, IOB2) >=20 > Store (LPPR, Index (TPM3, 0x01)) > Store (PPRP, Index (TPM3, 0x02)) @@ -257,11 +257,11 @@ > DefinitionBlock ( > // > Store (7, PPIP) > Store (DerefOf (Index (Arg2, 0x00)), PPRQ) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (PPIN, IOB2) > Return (FRET) > } > Case (8) > @@ -271,11 +271,11 @@ DefinitionBlock ( > // > Store (8, PPIP) > Store (DerefOf (Index (Arg2, 0x00)), UCRQ) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (PPIN, IOB2) >=20 > Return (FRET) > } > @@ -305,16 +305,16 @@ DefinitionBlock ( > // Save the Operation Value of the Request to MORD (reserved > memory) > // > Store (DerefOf (Index (Arg2, 0x00)), MORD) >=20 > // > - // Triggle the SMI through ACPI _DSM method. > + // Trigger the SMI through ACPI _DSM method. > // > Store (0x01, MCIP) >=20 > // > - // Triggle the SMI interrupt > + // Trigger the SMI interrupt > // > Store (MCIN, IOB2) > Return (MRET) > } > Default {BreakPoint} > -- > 2.16.2.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel