public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
* [Patch] SecurityPkg:Tcg: Fix comment typos
@ 2018-07-16  7:20 Zhang, Chao B
  2018-07-16  8:01 ` Long, Qin
  0 siblings, 1 reply; 2+ messages in thread
From: Zhang, Chao B @ 2018-07-16  7:20 UTC (permalink / raw)
  To: edk2-devel; +Cc: Long Qin, Jiewen Yao, Chao Zhang

"Triggle" is a typo. Fix it with "Trigger"

Cc: Long Qin <long.qin@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Signed-off-by: Zhang, Chao B <chao.b.zhang@intel.com>
---
 SecurityPkg/Tcg/Tcg2Smm/Tpm.asl | 16 ++++++++--------
 SecurityPkg/Tcg/TcgSmm/Tpm.asl  | 16 ++++++++--------
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
index 50dea0ab9a..471b6b1fa1 100644
--- a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
+++ b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
@@ -257,16 +257,16 @@ DefinitionBlock (
           // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
           //
           If (LNot (And (MORD, 0x10)))
           {
             //
-            // Triggle the SMI through ACPI _PTS method.
+            // Trigger the SMI through ACPI _PTS method.
             //
             Store (0x02, MCIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (MCIN, IOB2)
           }
         }
         Return (0)
@@ -363,11 +363,11 @@ DefinitionBlock (
             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
             Store (0, PPRM)
             Store (0x02, PPIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
             Return (FRET)
 
 
@@ -394,11 +394,11 @@ DefinitionBlock (
             // e) Return TPM Operation Response to OS Environment
             //
             Store (0x05, PPIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
 
             Store (LPPR, Index (TPM3, 0x01))
             Store (PPRP, Index (TPM3, 0x02))
@@ -426,11 +426,11 @@ DefinitionBlock (
             If (LEqual (PPRQ, 23)) {
               Store (DerefOf (Index (Arg2, 0x01)), PPRM)
             }
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
             Return (FRET)
           }
           Case (8)
@@ -440,11 +440,11 @@ DefinitionBlock (
             //
             Store (8, PPIP)
             Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
 
             Return (FRET)
           }
@@ -474,16 +474,16 @@ DefinitionBlock (
             // Save the Operation Value of the Request to MORD (reserved memory)
             //
             Store (DerefOf (Index (Arg2, 0x00)), MORD)
 
             //
-            // Triggle the SMI through ACPI _DSM method.
+            // Trigger the SMI through ACPI _DSM method.
             //
             Store (0x01, MCIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (MCIN, IOB2)
             Return (MRET)
           }
           Default {BreakPoint}
diff --git a/SecurityPkg/Tcg/TcgSmm/Tpm.asl b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
index 12f24f3996..2114283b45 100644
--- a/SecurityPkg/Tcg/TcgSmm/Tpm.asl
+++ b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
@@ -93,16 +93,16 @@ DefinitionBlock (
           // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
           //
           If (LNot (And (MORD, 0x10)))
           {
             //
-            // Triggle the SMI through ACPI _PTS method.
+            // Trigger the SMI through ACPI _PTS method.
             //
             Store (0x02, MCIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (MCIN, IOB2)
           }
         }
         Return (0)
@@ -198,11 +198,11 @@ DefinitionBlock (
 
             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
             Store (0x02, PPIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
             Return (FRET)
 
 
@@ -229,11 +229,11 @@ DefinitionBlock (
             // e) Return TPM Operation Response to OS Environment
             //
             Store (0x05, PPIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
 
             Store (LPPR, Index (TPM3, 0x01))
             Store (PPRP, Index (TPM3, 0x02))
@@ -257,11 +257,11 @@ DefinitionBlock (
             //
             Store (7, PPIP)
             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
             Return (FRET)
           }
           Case (8)
@@ -271,11 +271,11 @@ DefinitionBlock (
             //
             Store (8, PPIP)
             Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
 
             Return (FRET)
           }
@@ -305,16 +305,16 @@ DefinitionBlock (
             // Save the Operation Value of the Request to MORD (reserved memory)
             //
             Store (DerefOf (Index (Arg2, 0x00)), MORD)
 
             //
-            // Triggle the SMI through ACPI _DSM method.
+            // Trigger the SMI through ACPI _DSM method.
             //
             Store (0x01, MCIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (MCIN, IOB2)
             Return (MRET)
           }
           Default {BreakPoint}
-- 
2.16.2.windows.1



^ permalink raw reply related	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2018-07-16  8:02 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-07-16  7:20 [Patch] SecurityPkg:Tcg: Fix comment typos Zhang, Chao B
2018-07-16  8:01 ` Long, Qin

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox