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"Zhang, Hongbin1" , "Ni, Ray" , "Kinney, Michael D" Subject: Re: [edk2-devel] Proposing v3 of MM communicate buffer Thread-Topic: Proposing v3 of MM communicate buffer Thread-Index: Adro6QAPLf/WRMT7RNuaRkedI6TpYwAgLKmVABOn43A= Date: Thu, 8 Aug 2024 17:41:48 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=8a5f3bc2-1702-443d-84a2-a63e5af27909;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2024-08-07T16:33:32Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: BL1PR21MB3160:EE_|MWHPR21MB4454:EE_ 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List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 08 Aug 2024 23:59:49 -0700 Resent-From: Kun.Qin@microsoft.com Reply-To: devel@edk2.groups.io,Kun.Qin@microsoft.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Ji7Pv5dd6No06zFEujcSQPCOx7686176AA= Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_BL1PR21MB3160535474514AF6B7A9144EE9B92BL1PR21MB3160namp_" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=PKDWV+br; dmarc=pass (policy=none) header.from=groups.io; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io --_000_BL1PR21MB3160535474514AF6B7A9144EE9B92BL1PR21MB3160namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Ray, Thanks for your feedback. The ARM platforms I was exposed to have consisten= t operation mode is only AARCH64, so this proposal is not particularly atta= ched to any ARM problem. I agree that 32bit PEI/DXE communicate into MM will have issue on x86 platf= orms as of today. But I have only heard Intel processors moving to support = x64 PEI/DXE. I think introducing a new MM communicate header will help to p= revent the issue to propagate much further as it might take non-Intel x86 p= latforms years to fully move away from 32bit PEI/DXE. Please let me know if= you have any thoughts. Regards, Kun P.S. Project MU have a thunking module that can launch x64 MM core from 32b= it environment: mu_feature_mm_supv/MmSupervisorPkg/Drivers/MmPeiLaunchers/M= mIplX64Relay.inf at main * microsoft/mu_feature_mm_supv (github.com). We can upstream it to edk2 if folks thi= nk it will help. From: Ni, Ray Sent: Thursday, August 8, 2024 1:15 AM To: devel@edk2.groups.io; Kun Qin Cc: Wu, Jiaxin ; Tan, Dun ; Xu, Wei= 6 ; Zhang, Hongbin1 ; Ni, Ray = ; Kinney, Michael D Subject: [EXTERNAL] Re: Proposing v3 of MM communicate buffer Kun, I like your proposed solution as it is backward compatible. But, I think the new PPI/Protocol is only useful when the CPU mode where PP= I/Protocol is produced does not match the CPU mode in MM. In X86, it could be: 32bit PEI + 64bit MM, 32bit DXE + 64bit MM, or vice ve= rsa. But I doubt the value of support these combinations in X86. Because th= at means the IPL (either PEI or DXE module) needs to support invoking MM Co= re in a different CPU mode. And the latest X86 platforms are switching to 64bit PEI + 64bit DXE + 64bit= MM. Does the proposal try to solve some ARM problem? Can you explain the necess= ity? I would like to avoid the complicated interfaces which do not solve a = practical problem. Thanks, Ray ________________________________ From: devel@edk2.groups.io > on behalf of Kun Qin via groups.io > Sent: Thursday, August 8, 2024 2:14 To: devel@edk2.groups.io > Subject: [edk2-devel] Proposing v3 of MM communicate buffer Hi all, I am trying to propose a change into PI spec and would like to gather some = feedback in this forum. Essentially, the current communicate header contains a UINTN field in place= , which is causing programing errors when trying to communicate the message between different operation m= ode (i.e. PEI in IA32 communicate into MM in x64). There are various implementations at large to = compensate for this size discrepancy through the edk2 codebase, thus fixing the existing commun= icate buffer definition will be less feasible. Thus I think proposing a new structure and implement= the corresponding header parser will be a simpler approach, which also allows a bit more flexibility= to inject new features/checks into the communication channel. The proposed change for the spec is detailed here: https://github.com/kuqin12/edk2/blob/BZ3398-MmCommunicate-Length-v4/CodeFir= st/BZ3430-SpecChange.md And the code first change is listed here: https://github.com/kuqin12/edk2/blob/BZ3398-MmCommunicate-Length-v4/ Could you please provide me with any feedback that you think might be helpf= ul for future usage of MM communicate? Any input is appreciated. Regards, Kun -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#120307): https://edk2.groups.io/g/devel/message/120307 Mute This Topic: https://groups.io/mt/107775882/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --_000_BL1PR21MB3160535474514AF6B7A9144EE9B92BL1PR21MB3160namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hi Ray,

 

Thanks for your feedback. The ARM platforms I was e= xposed to have consistent operation mode is only AARCH64, so this proposal = is not particularly attached to any ARM problem.

 

I agree that 32bit PEI/DXE communicate into MM will= have issue on x86 platforms as of today. But I have only heard Intel proce= ssors moving to support x64 PEI/DXE. I think introducing a new MM communicate header will help to prevent the issue to propagate mu= ch further as it might take non-Intel x86 platforms years to fully move awa= y from 32bit PEI/DXE. Please let me know if you have any thoughts.

 

Regards,

Kun

 

P.S. Project MU have a thunking module that can lau= nch x64 MM core from 32bit environment: mu_feature_mm_supv/MmSupervisorPkg/Drivers/MmPeiLaunchers/MmIplX64Relay.inf= at main · microsoft/mu_feature_mm_supv (github.com). We can ups= tream it to edk2 if folks think it will help.

 

From: Ni, Ray <ray.ni@intel.com&g= t;
Sent: Thursday, August 8, 2024 1:15 AM
To: devel@edk2.groups.io; Kun Qin <Kun.Qin@microsoft.com>
Cc: Wu, Jiaxin <jiaxin.wu@intel.com>; Tan, Dun <dun.tan@int= el.com>; Xu, Wei6 <wei6.xu@intel.com>; Zhang, Hongbin1 <hongbin= 1.zhang@intel.com>; Ni, Ray <ray.ni@intel.com>; Kinney, Michael D = <michael.d.kinney@intel.com>
Subject: [EXTERNAL] Re: Proposing v3 of MM communicate buffer

 

Kun,

I like = your proposed solution as it is backward compatible.

&n= bsp;

But, I = think the new PPI/Protocol is only useful when the CPU mode where PPI/Proto= col is produced does not match the CPU mode in MM.

&n= bsp;

In X86,= it could be: 32bit PEI + 64bit MM, 32bit DXE + 64bit MM, or vice versa. Bu= t I doubt the value of support these combinations in X86. Because that mean= s the IPL (either PEI or DXE module) needs to support invoking MM Core in a different CPU mode.

And the= latest X86 platforms are switching to 64bit PEI + 64bit DXE + 64bit MM.

&n= bsp;

Does th= e proposal try to solve some ARM problem? Can you explain the necessity? I = would like to avoid the complicated interfaces which do not solve a practic= al problem.

&n= bsp;

Thanks,=

Ray

&n= bsp;

From: <= /span>devel@edk2.groups.io<= /a> <devel@edk2.groups.io> on behalf of Kun Qin via groups.io <Kun.Qin=3Dmicrosoft.com= @groups.io>
Sent: Thursday, August 8, 2024 2:14
To: devel@edk2= .groups.io <devel@edk2.groups.io>
Subject: [edk2-devel] Proposing v3 of MM communicate buffer

 

Hi all,

 

I am trying to propose a change into PI spec and would like to gather s= ome feedback in this forum.

 

Essentially, the current communicate header contains a UINTN field in p= lace, which is causing programing

errors when trying to communicate the message between different operati= on mode (i.e. PEI in IA32

communicate into MM in x64). There are various implementations at large= to compensate for this

size discrepancy through the edk2 codebase, thus fixing the existing co= mmunicate buffer definition

will be less feasible. Thus I think proposing a new structure and imple= ment the corresponding header

parser will be a simpler approach, which also allows a bit more flexibi= lity to inject new features/checks

into the communication channel.

 

The proposed change for the spec is detailed here:

https://github.com/ku= qin12/edk2/blob/BZ3398-MmCommunicate-Length-v4/CodeFirst/BZ3430-SpecChange.= md

 

And the code first change is listed here:

https://github.com/kuqin12= /edk2/blob/BZ3398-MmCommunicate-Length-v4/

 

Could you please provide me with any feedback that you think might be h= elpful for future usage of MM

communicate? Any input is appreciated.

 

Regards,

Kun

 

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