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X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Sep 2016 15:36:13 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable During Mmu initialization in the CpuDxe, for a page table any bits set in t= he 'NextSectionAttributes' are garbage and were set from bits that are actu= ally part of the pagetable address. We clear it out to zero so that the Sy= ncCacheConfigPage will use the page attributes instead of trying to convert= the (bogus) section attributes into page attributes Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Kurt Kennett --- ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mm= u.c index 63da8ba..64ef1bb 100644 --- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c +++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c @@ -297,6 +297,11 @@ SyncCacheConfig ( } NextRegionLength +=3D TT_DESCRIPTOR_SECTION_SIZE; } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i]= )) { + // In this case any bits set in the 'NextSectionAttributes' are garb= age and were set from + // bits that are actually part of the pagetable address. We clear i= t out to zero so that + // the SyncCacheConfigPage will use the page attributes instead of t= rying to convert the + // section attributes into page attributes + NextSectionAttributes =3D 0; Status =3D SyncCacheConfigPage ( i,FirstLevelTable[i], NumberOfDescriptors, MemorySpaceMap, -- 2.9.0.windows.1