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From: "Heng Luo" <heng.luo@intel.com>
To: "mikuback@linux.microsoft.com" <mikuback@linux.microsoft.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Chaganty, Rangasai V" <rangasai.v.chaganty@intel.com>,
	"Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>
Subject: Re: [edk2-platforms][PATCH v5 14/46] TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
Date: Mon, 23 Aug 2021 03:15:17 +0000	[thread overview]
Message-ID: <BL3PR11MB57458FA2465187DB6406784A93C49@BL3PR11MB5745.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20210803023914.1569-15-mikuback@linux.microsoft.com>

Reviewed-by: Heng Luo <heng.luo@intel.com>

> -----Original Message-----
> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
> Sent: Tuesday, August 3, 2021 10:39 AM
> To: devel@edk2.groups.io
> Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone,
> Nathaniel L <nathaniel.l.desimone@intel.com>; Luo, Heng <heng.luo@intel.com>
> Subject: [edk2-platforms][PATCH v5 14/46] TigerlakeOpenBoardPkg: Use
> IntelSiliconPkg BIOS area and ucode PCDs
> 
> From: Michael Kubacki <michael.kubacki@microsoft.com>
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
> 
> Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are
> declared in IntelSiliconPkg.dec.
> 
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Heng Luo <heng.luo@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
>  Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf                         |  8
> ++---
> 
> Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapIn
> clude.fdf |  4 +--
>  Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
> | 38 ++++++++++----------
>  3 files changed, 25 insertions(+), 25 deletions(-)
> 
> diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
> b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
> index 66c8814c97bb..56da991ab544 100644
> --- a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
> +++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
> @@ -39,8 +39,8 @@ [Packages]
>    BoardModulePkg/BoardModulePkg.dec
> 
>  [Pcd]
> -  gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress                     ## CONSUMES
> -  gSiPkgTokenSpaceGuid.PcdBiosSize                                ## CONSUMES
> +  gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress           ##
> CONSUMES
> +  gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize                      ## CONSUMES
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase    ##
> CONSUMES
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize    ##
> CONSUMES
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase  ##
> CONSUMES @@ -61,8 +61,8 @@ [Pcd]
>    gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize            ##
> CONSUMES
>    gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase          ##
> CONSUMES
>    gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize          ##
> CONSUMES
> -  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase                    ## CONSUMES
> -  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                    ## CONSUMES
> +  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase          ##
> CONSUMES
> +  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize          ##
> CONSUMES
>    gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase                ## CONSUMES
>    gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize                ## CONSUMES
>    gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase                ##
> CONSUMES
> diff --git
> a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapI
> nclude.fdf
> b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapI
> nclude.fdf
> index b21ae6401f12..24e2a963ba64 100644
> ---
> a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapI
> nclude.fdf
> +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/Fla
> +++ shMapInclude.fdf
> @@ -37,8 +37,8 @@
>  ## Build script checks the requirement.
>  SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset       =
> 0x00800000  # Flash addr (0xFFC00000)
>  SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize         =
> 0x00080000  # Keep 0x80000 or larger
> -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset                    =
> 0x00880000  # Flash addr (0xFFC80000)
> -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                      = 0x00070000
> # Keep 0x70000 or larger, change MicrocodeFv.fdf in case that this value change
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset          =
> 0x00880000  # Flash addr (0xFFC80000)
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize            =
> 0x00070000  # Keep 0x70000 or larger, change MicrocodeFv.fdf in case that this
> value change
>  SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset          =
> 0x008F0000  # Flash addr (0xFFC00000)
>  SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize            =
> 0x00080000  #
>  SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset                =
> 0x00970000  # Flash addr (0xFFD70000)
> diff --git
> a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
> b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
> index c1fd2be6af54..e3b2f048524c 100644
> --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
> +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fd
> +++ f
> @@ -29,8 +29,8 @@ [FD.TigerlakeURvp]
>  # assigned with PCD values. Instead, it uses the definitions for its variety, which
> # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
>  #
> -BaseAddress   = $(FLASH_BASE) |
> gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of the
> FLASH Device.
> -Size          = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize             #The size
> in bytes of the FLASH Device
> +BaseAddress   = $(FLASH_BASE) |
> gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of
> the FLASH Device.
> +Size          = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
> #The size in bytes of the FLASH Device
>  ErasePolarity = 1
>  BlockSize     = $(FLASH_BLOCK_SIZE)
>  NumBlocks     = $(FLASH_NUM_BLOCKS)
> @@ -41,23 +41,23 @@ [FD.TigerlakeURvp]
>  # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase,
> because macro expression is not supported.
>  # So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase
> to get the real CodeCache base address.
>  SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =
> $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
> -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
> $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
>  SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x1000 -SET
> gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
> $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
> -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
> $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
> -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
> $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) +
> $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
> -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
> $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) -
> $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
> -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
> gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
> -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    =
> gSiPkgTokenSpaceGuid.PcdBiosSize
> -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
> $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
> -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
> $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
> -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
> $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
> +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) +
> +$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
> +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) -
> +$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
> +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
> gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
> +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    =
> gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
> +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> +$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
> +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> +$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
> +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
> +$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
> +$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
>  SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv     =
> gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase    =
> gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    =
> gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  =
> gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    =
> gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           =
> gSiPkgTokenSpaceGuid.PcdBiosSize
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase    =
> gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    =
> gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  =
> gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    =
> gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           =
> gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
> 
> #################################################################
> ###############
>  #
>  # Following are lists of FD Region layout which correspond to the locations of
> different @@ -153,8 +153,8 @@ [FD.TigerlakeURvp]
> gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase|gBoardModul
> eTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize
>  FV = FvFwBinaries
> 
> -
> gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.Pcd
> FlashMicrocodeFvSize
> -
> gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFl
> ashMicrocodeFvSize
> +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconP
> +kgTokenSpaceGuid.PcdFlashMicrocodeFvSize
> +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkg
> +TokenSpaceGuid.PcdFlashMicrocodeFvSize
>  #Microcode
>  FV = FvMicrocode
> 
> --
> 2.28.0.windows.1


  reply	other threads:[~2021-08-23  3:15 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20210803023914.1569-1-mikuback@linux.microsoft.com>
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 01/46] CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 02/46] WhiskeylakeOpenBoardPkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 03/46] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 04/46] IntelSiliconPkg: Add BIOS area base address and size PCDs Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 05/46] IntelSiliconPkg: Add microcode FV PCDs Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 06/46] IntelSiliconPkg: Add PCH SPI PPI Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 07/46] IntelSiliconPkg: Add PCH SPI Protocol Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 08/46] IntelSiliconPkg: Add SpiFlashCommonLib Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 09/46] IntelSiliconPkg: Add SmmSpiFlashCommonLib Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 12/46] KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 13/46] SimicsOpenBoardPkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 14/46] TigerlakeOpenBoardPkg: " Michael Kubacki
2021-08-23  3:15   ` Heng Luo [this message]
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 16/46] CoffeelakeSiliconPkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 17/46] KabylakeSiliconPkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 18/46] SimicsIch10Pkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 19/46] TigerlakeSiliconPkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 20/46] CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 21/46] KabylakeOpenBoardPkg: " Michael Kubacki
2021-08-03  7:38   ` Chiu, Chasel
2021-08-03 15:09     ` [edk2-devel] " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 22/46] SimicsOpenBoardPkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 24/46] WhiskeylakeOpenBoardPkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 25/46] PurleyOpenBoardPkg: Use IntelSiliconPkg SpiFvbServiceSmm Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 26/46] WhitleyOpenBoardPkg: UseIntelSiliconPkg SpiFvbServiceSmm Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 27/46] MinPlatformPkg: Remove SpiFvbService modules Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 28/46] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 29/46] KabylakeSiliconPkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 30/46] SimicsIch10Pkg: " Michael Kubacki
2021-08-03  2:38 ` [edk2-platforms][PATCH v5 31/46] TigerlakeOpenBoardPkg: " Michael Kubacki
2021-08-23  2:56   ` Chaganty, Rangasai V
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 33/46] PurleyOpenBoardPkg: Add SpiFlashCommonLib.h Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 34/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 35/46] CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 36/46] KabylakeSiliconPkg: " Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 37/46] SimicsIch10Pkg: Remove PCH SPI SMM " Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 38/46] TigerlakeSiliconPkg: Remove PCH SPI PPI and " Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 39/46] IntelSiliconPkg: Add flash region GUIDs Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 40/46] IntelSiliconPkg: Identify flash regions by GUID Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 41/46] CoffeelakeSiliconPkg/BasePchSpiCommonLib: " Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 42/46] KabylakeSiliconPkg: " Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 44/46] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build Michael Kubacki
2021-08-06  2:44   ` Chiu, Chasel
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 45/46] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID Michael Kubacki
2021-08-03  2:39 ` [edk2-platforms][PATCH v5 46/46] TigerlakeSiliconPkg/BasePchSpiCommonLib: " Michael Kubacki
     [not found] ` <20210803023914.1569-44-mikuback@linux.microsoft.com>
2021-08-06  2:44   ` [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Chiu, Chasel
     [not found] ` <20210803023914.1569-24-mikuback@linux.microsoft.com>
2021-08-23  2:57   ` [edk2-platforms][PATCH v5 23/46] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Chaganty, Rangasai V
2021-10-22  0:21 ` [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances Nate DeSimone
2021-10-28 22:13   ` Michael Kubacki

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