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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: Zeng, Star > Sent: Thursday, October 21, 2021 11:28 AM > To: devel@edk2.groups.io > Cc: Zeng, Star ; Kinney, Michael D ; Liming Gao > ; Liu, Zhiguang ; Ni, R= ay > Subject: [PATCH] MdePkg Cpuid.h: Define CPUID.(EAX=3D7,ECX=3D0):EDX[30] >=20 > This patch follows new Intel SDM to define CPUID.(EAX=3D7,ECX=3D0):EDX[30= ]. >=20 > Signed-off-by: Star Zeng > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Cc: Ray Ni > --- > MdePkg/Include/Register/Intel/Cpuid.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/MdePkg/Include/Register/Intel/Cpuid.h b/MdePkg/Include/Regis= ter/Intel/Cpuid.h > index 6f77e174c115..5ec85ba561ac 100644 > --- a/MdePkg/Include/Register/Intel/Cpuid.h > +++ b/MdePkg/Include/Register/Intel/Cpuid.h > @@ -1587,9 +1587,9 @@ typedef union { > /// >=20 > UINT32 EnumeratesSupportForCapability:1; >=20 > /// >=20 > - /// [Bit 30] Reserved. >=20 > + /// [Bit 30] Enumerates support for the IA32_CORE_CAPABILITIES MSR. >=20 > /// >=20 > - UINT32 Reserved3:1; >=20 > + UINT32 EnumeratesSupportForCoreCapabilitiesMsr:1; >=20 > /// >=20 > /// [Bit 31] Enumerates support for Speculative Store Bypass Disable= (SSBD). >=20 > /// Processors that set this bit sup-port the IA32_SPEC_CTRL MSR. Th= ey allow >=20 > -- > 2.27.0.windows.1