From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (NAM10-DM6-obe.outbound.protection.outlook.com [40.107.93.68]) by mx.groups.io with SMTP id smtpd.web12.6437.1595282116659845821 for ; Mon, 20 Jul 2020 14:55:16 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@vmware.com header.s=selector2 header.b=ThHEftYM; spf=pass (domain: vmware.com, ip: 40.107.93.68, mailfrom: awarkentin@vmware.com) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=MWpzlTeQ0nBhYYIdoULpAlSAy6BCc50BTiNHYt+Sf2y9CGIkE+hRiWFv7XduzdMv0vI2QtVjNetIWe+Ii51O5NX198Y4E+fsETtXVEYPijszo9YxHygYBXS/O/6R0LxsNnZMepOYHz4lD+nvcKV608FbtzqRCklx46G6eMqQMQxAoIupghd+JsRFn/h6MHTjRNJPO/PsmyuKQ1PQWsfI24wdIjkkexiPgx8BCXEP0+unSSkOjvtMsH1gLr4YoKt1c+bqG5C78eb+IjBYpLTss4dvavDvw8fAaTO/FeK4SQya7f/92JIU2geAs2I79FIrorjeZ6yUpeJZCTsZrGIGPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WurYQBJZUBW9jZiYyov8RtjqLLSdO5EFs9GqAUWpkWg=; b=jxokFk2pno7KapFaM55z7Yt7xuJWon7sTrTMBVBR2elZuZzFHT2oHtUe3MkFkNuQtMEknvbkiA/1/cDXH6eAS2bS2mV20Dg/+nzw2Xh7vTR2XtKxjkHOjrB8bNL8vbKbMc1aKUtDaEiOuDxyKcueUTUT0Da6KvPUtH9a8zyEvC3+AChjFH1y1DM/4wTWKLOARRlC8b77iHeRWdEy//yAoqM+KSacZc0Cap/EkF+aLw0SWjysZeD413sd7Mh6rtI12iM5Go3mHh0SmRD/KFYDMcoEYZ3qRMHH4OCDS36q6ZLAW8ztlFZpFxjbE4gaFnayQdU/1/9ckaVVYid03+ktIQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=vmware.com; dmarc=pass action=none header.from=vmware.com; dkim=pass header.d=vmware.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vmware.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WurYQBJZUBW9jZiYyov8RtjqLLSdO5EFs9GqAUWpkWg=; b=ThHEftYM/b4Bnos37gNwhxJYu0FlIjdkIQJLWMPua+OkGyp8pzUTWDJQ5JUvVF81xUU9BtDPfrJp889Xp3Aq+ld4zfDrq8ZzEpcIYxBzZ2UrqO+UaxHwxDBmirTtrCSGaSi3o54FvHu4yFipcvzNgdJxjWErHaozBJE2nnRqVJA= Received: from BN6PR05MB3411.namprd05.prod.outlook.com (2603:10b6:405:43::23) by BN3PR05MB2500.namprd05.prod.outlook.com (2a01:111:e400:7bb5::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3216.14; Mon, 20 Jul 2020 21:55:15 +0000 Received: from BN6PR05MB3411.namprd05.prod.outlook.com ([fe80::e1ef:31eb:c802:aef0]) by BN6PR05MB3411.namprd05.prod.outlook.com ([fe80::e1ef:31eb:c802:aef0%3]) with mapi id 15.20.3216.017; Mon, 20 Jul 2020 21:55:14 +0000 From: "Andrei Warkentin" To: Samer El-Haj-Mahmoud , "devel@edk2.groups.io" CC: Leif Lindholm , Pete Batard , Ard Biesheuvel Subject: Re: [edk2-platform][PATCH v1 4/7] Platforms/RaspberryPi: SMBIOS Type 4 fixes Thread-Topic: [edk2-platform][PATCH v1 4/7] Platforms/RaspberryPi: SMBIOS Type 4 fixes Thread-Index: AQHWXsH2NnnK1kckvk6Vpp73g+aRDakRA16N Date: Mon, 20 Jul 2020 21:55:14 +0000 Message-ID: References: <20200720181646.2891-1-Samer.El-Haj-Mahmoud@arm.com>,<20200720181646.2891-5-Samer.El-Haj-Mahmoud@arm.com> In-Reply-To: <20200720181646.2891-5-Samer.El-Haj-Mahmoud@arm.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=vmware.com; x-originating-ip: [98.214.99.181] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 187c3f10-1d33-4c14-3a41-08d82cf79581 x-ms-traffictypediagnostic: BN3PR05MB2500: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5516; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: ig4L8e5qGNpQqhKE66yjKu8Kv2HULPT0Zb+jP4WOD1B/jO9aVYtLGLa1dSiXBQIca9CijRndnlCZcmcTFTsde6gqX+PBFv7XF33bZSh6cgChmJqyq4YWCxd+1G5KIyuWbaCOFsdsGF7gq6zP0yUgc9LRT+rZm+NbH7oOsA9B/QNJtuYaUjCciFtHk7QqM569Rno89U5Q9lL5eos/OKoiyXp3yN232t7nHfgtbvpvRRPHaxOx/k03kCpfLhr/RZWcodJqJhJEqZ1sB0J0gNc5FvjIo5pCHz1niMGB5ByOahcxpIYkHMt2JhF3S581Zb7+0DT68Erm+iyX/VpInc5M+g== x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BN6PR05MB3411.namprd05.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(4636009)(366004)(396003)(39860400002)(346002)(376002)(136003)(53546011)(83380400001)(86362001)(71200400001)(33656002)(19627235002)(6506007)(55016002)(8936002)(316002)(52536014)(8676002)(26005)(5660300002)(19627405001)(66476007)(2906002)(7696005)(110136005)(66556008)(64756008)(66946007)(66446008)(54906003)(9686003)(76116006)(478600001)(186003)(4326008);DIR:OUT;SFP:1101; x-ms-exchange-antispam-messagedata: E4ONAJzfMUOB7QPkt4NI8cABYjM3Ok7LkAreheupVUOo0/fmYwbQOmcBByqkqljJif4dwa3fUc7HCza2Rkxy2O//DF+mzxJvwvEb3FRM3goL3pX8iZJX5rvS43aiakTEMZuO1Hx9BTZkCIvQmiCWg/08eSWAsCssw/Mv8Yl/01x3XC+zsMp+S9YvKwMufBB883d9FONh0T/LU3aRCJB2My1+D1Fn7al1UyK1cvnxPC9WKs4krsWcCe6gheVV1vyNJc6iT8ROe1XTksMGa+Z/X5rkmdpwT/xM1FHjd8QzPVlblPlfqJJZXt4e0tAHyFRgQcPag6b3mOHIkZ/5YZM6+O+axLs9QfBRp0EC4OPSXMxyIeKqYYcTnHf0YIz8hg8oTZZSVbgtIb2g9LvlcqQmzhco0OyCZMswh0gGB8L6jpEHSSaY2DsTbq5BmgFPeJX087OBBndOfXzNEFFM59MNG5ctjrov4gbLnIWCuFZk99S+r1L8qJDsgPPHOAAi5Xn8 x-ms-exchange-transport-forked: True MIME-Version: 1.0 X-OriginatorOrg: vmware.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN6PR05MB3411.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 187c3f10-1d33-4c14-3a41-08d82cf79581 X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Jul 2020 21:55:14.8204 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b39138ca-3cee-4b4a-a4d6-cd83d9dd62f0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: I1hr2sKMosfeFhVluohWDrVxJtWoOfJImQ2b9KaQas9uYG699KUD3HLGqEkXZZdZBkZB3P0BvVBfQx0a3kbGMw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN3PR05MB2500 Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_BN6PR05MB34113B5F8CFDC807E6BF725DB97B0BN6PR05MB3411namp_" --_000_BN6PR05MB34113B5F8CFDC807E6BF725DB97B0BN6PR05MB3411namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Andrei Warkentin ________________________________ From: Samer El-Haj-Mahmoud Sent: Monday, July 20, 2020 1:16 PM To: devel@edk2.groups.io Cc: Leif Lindholm ; Pete Batard ; Andrei W= arkentin ; Ard Biesheuvel Subject: [edk2-platform][PATCH v1 4/7] Platforms/RaspberryPi: SMBIOS Type 4= fixes Various fixes and enhancements for SMBIOS Type 4: - Fix ProcessorId to correctly report the Arm64 MIDR_EL1 value - Change ProcessorUpgrade from Other to None - Add comments for ProcessorCharacteristics fields - Add CoreCount2, EnabledCoreCount2, and ThreadCount2 - Set LxCacheHandle to 0xFFFF Cc: Leif Lindholm Cc: Pete Batard Cc: Andrei Warkentin Cc: Ard Biesheuvel Signed-off-by: Samer El-Haj-Mahmoud --- Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf | 1 = + Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 87 = ++++++++------------ 2 files changed, 34 insertions(+), 54 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosD= xe.inf b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.i= nf index 817b902b1fad..2b24b22c25fc 100644 --- a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf +++ b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf @@ -31,6 +31,7 @@ [Packages] EmbeddedPkg/EmbeddedPkg.dec [LibraryClasses] + ArmLib UefiBootServicesTableLib MemoryAllocationLib BaseMemoryLib diff --git a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosD= xe.c b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c index 21feab3e47a5..4dcdec5615dc 100644 --- a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c +++ b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -230,55 +231,13 @@ CHAR8 *mEnclosureInfoType3Strings[] =3D { ************************************************************************/ SMBIOS_TABLE_TYPE4 mProcessorInfoType4 =3D { { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0}= , - 1, // Socket String - CentralProcessor, // ProcessorType; = ///< The enumeration value from PROCESSOR_TYPE_DATA. + 1, // Socket String + CentralProcessor, // ProcessorType; ///< The enu= meration value from PROCESSOR_TYPE_DATA. ProcessorFamilyIndicatorFamily2, // ProcessorFamily; ///< The enu= meration value from PROCESSOR_FAMILY2_DATA. - 2, // ProcessorManufacture String; - { // ProcessorId; - { // PROCESSOR_SIGNATURE - 0, // ProcessorSteppingId:4; - 0, // ProcessorModel: 4; - 0, // ProcessorFamily: 4; - 0, // ProcessorType: 2; - 0, // ProcessorReserved1: 2; - 0, // ProcessorXModel: 4; - 0, // ProcessorXFamily: 8; - 0, // ProcessorReserved2: 4; - }, - - { // PROCESSOR_FEATURE_FLAGS - 0, // ProcessorFpu :1; - 0, // ProcessorVme :1; - 0, // ProcessorDe :1; - 0, // ProcessorPse :1; - 0, // ProcessorTsc :1; - 0, // ProcessorMsr :1; - 0, // ProcessorPae :1; - 0, // ProcessorMce :1; - 0, // ProcessorCx8 :1; - 0, // ProcessorApic :1; - 0, // ProcessorReserved1 :1; - 0, // ProcessorSep :1; - 0, // ProcessorMtrr :1; - 0, // ProcessorPge :1; - 0, // ProcessorMca :1; - 0, // ProcessorCmov :1; - 0, // ProcessorPat :1; - 0, // ProcessorPse36 :1; - 0, // ProcessorPsn :1; - 0, // ProcessorClfsh :1; - 0, // ProcessorReserved2 :1; - 0, // ProcessorDs :1; - 0, // ProcessorAcpi :1; - 0, // ProcessorMmx :1; - 0, // ProcessorFxsr :1; - 0, // ProcessorSse :1; - 0, // ProcessorSse2 :1; - 0, // ProcessorSs :1; - 0, // ProcessorReserved3 :1; - 0, // ProcessorTm :1; - 0, // ProcessorReserved4 :2; - } + 2, // ProcessorManufacture String; + { // ProcessorId; + { 0x00, 0x00, 0x00, 0x00 }, + { 0x00, 0x00, 0x00, 0x00 } }, 3, // ProcessorVersion String; { // Voltage; @@ -293,18 +252,31 @@ SMBIOS_TABLE_TYPE4 mProcessorInfoType4 =3D { 0, // MaxSpeed; 0, // CurrentSpeed; 0x41, // Status; - ProcessorUpgradeOther, // ProcessorUpgrade; ///< The enumeration v= alue from PROCESSOR_UPGRADE. - 0, // L1CacheHandle; - 0, // L2CacheHandle; - 0, // L3CacheHandle; + ProcessorUpgradeNone, // ProcessorUpgrade; ///< The enumeratio= n value from PROCESSOR_UPGRADE. + 0xFFFF, // L1CacheHandle; + 0xFFFF, // L2CacheHandle; + 0xFFFF, // L3CacheHandle; 0, // SerialNumber; 0, // AssetTag; 0, // PartNumber; 4, // CoreCount; 4, // EnabledCoreCount; 4, // ThreadCount; - 0x6C, // ProcessorCharacteristics; + 0x6C, // ProcessorCharacteristics; ///< The enumeratio= n value from PROCESSOR_CHARACTERISTIC_FLAGS + // ProcessorReserved1 :1; + // ProcessorUnknown :1; + // Processor64BitCapble :1; + // ProcessorMultiCore :1; + // ProcessorHardwareThread :1; + // ProcessorExecuteProtection :1; + // ProcessorEnhancedVirtualization :1; + // ProcessorPowerPerformanceCtrl :1; + // Processor128bitCapble :1; + // ProcessorReserved2 :7; ProcessorFamilyARM, // ARM Processor Family; + 0, // CoreCount2; + 0, // EnabledCoreCount2; + 0, // ThreadCount2; }; CHAR8 mCpuName[128] =3D "Unknown ARM CPU"; @@ -832,11 +804,15 @@ ProcessorInfoUpdateSmbiosType4 ( ) { EFI_STATUS Status; - UINT32 Rate; + UINT32 Rate; + UINT64 *ProcessorId; mProcessorInfoType4.CoreCount =3D (UINT8)MaxCpus; + mProcessorInfoType4.CoreCount2 =3D (UINT8)MaxCpus; mProcessorInfoType4.EnabledCoreCount =3D (UINT8)MaxCpus; + mProcessorInfoType4.EnabledCoreCount2 =3D (UINT8)MaxCpus; mProcessorInfoType4.ThreadCount =3D (UINT8)MaxCpus; + mProcessorInfoType4.ThreadCount2 =3D (UINT8)MaxCpus; Status =3D mFwProtocol->GetMaxClockRate (RPI_MBOX_CLOCK_RATE_ARM, &Rate)= ; if (Status !=3D EFI_SUCCESS) { @@ -856,6 +832,9 @@ ProcessorInfoUpdateSmbiosType4 ( AsciiStrCpyS (mCpuName, sizeof (mCpuName), mFwProtocol->GetCpuName (-1))= ; + ProcessorId =3D (UINT64 *)&(mProcessorInfoType4.ProcessorId); + *ProcessorId =3D ArmReadMidr(); + LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mProcessorInfoType4, mProcesso= rInfoType4Strings, NULL); } -- 2.17.1 --_000_BN6PR05MB34113B5F8CFDC807E6BF725DB97B0BN6PR05MB3411namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Reviewed-by: Andrei Warken= tin <awarkentin@vmware.com>
From: Samer El-Haj-Mahmoud = <Samer.El-Haj-Mahmoud@arm.com>
Sent: Monday, July 20, 2020 1:16 PM
To: devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Leif Lindholm <leif@nuviainc.com>; Pete Batard <pete@ak= eo.ie>; Andrei Warkentin <awarkentin@vmware.com>; Ard Biesheuvel &= lt;ard.biesheuvel@arm.com>
Subject: [edk2-platform][PATCH v1 4/7] Platforms/RaspberryPi: SMBIOS= Type 4 fixes
 
Various fixes and enhancements for SMBIOS Type 4:<= br>  - Fix ProcessorId to correctly report the Arm64 MIDR_EL1 value
 - Change ProcessorUpgrade from Other to None
 - Add comments for ProcessorCharacteristics fields
 - Add CoreCount2, EnabledCoreCount2, and ThreadCount2
 - Set LxCacheHandle to 0xFFFF

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Pete Batard <pete@akeo.ie>
Cc: Andrei Warkentin <awarkentin@vmware.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@arm.com> ---
 Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf = |  1 +
 Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c&nb= sp;  | 87 ++++++++------------
 2 files changed, 34 insertions(+), 54 deletions(-)

diff --git a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosD= xe.inf b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.i= nf
index 817b902b1fad..2b24b22c25fc 100644
--- a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf<= br> +++ b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf<= br> @@ -31,6 +31,7 @@ [Packages]
   EmbeddedPkg/EmbeddedPkg.dec
 
 [LibraryClasses]
+  ArmLib
   UefiBootServicesTableLib
   MemoryAllocationLib
   BaseMemoryLib
diff --git a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosD= xe.c b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c index 21feab3e47a5..4dcdec5615dc 100644
--- a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c +++ b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -32,6 +32,7 @@
 #include <Protocol/Smbios.h>
 #include <Protocol/RpiFirmware.h>
 #include <Guid/SmBios.h>
+#include <Library/ArmLib.h>
 #include <Library/DebugLib.h>
 #include <Library/UefiDriverEntryPoint.h>
 #include <Library/UefiLib.h>
@@ -230,55 +231,13 @@ CHAR8 *mEnclosureInfoType3Strings[] =3D {
 *********************************************************************= ***/
 SMBIOS_TABLE_TYPE4 mProcessorInfoType4 =3D {
   { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_= TYPE4), 0},
-  1,           = ;         // Socket String
-  CentralProcessor,       // ProcessorT= ype;            = ;            &n= bsp;          ///< The enum= eration value from PROCESSOR_TYPE_DATA.
+  1,           = ;            &n= bsp;       // Socket String
+  CentralProcessor,        &n= bsp;       // ProcessorType;   = ;       ///< The enumeration value from PR= OCESSOR_TYPE_DATA.
   ProcessorFamilyIndicatorFamily2, // ProcessorFamily; &nbs= p;      ///< The enumeration value from PROCESS= OR_FAMILY2_DATA.
-  2,           = ;         // ProcessorManufacture S= tring;
-  {           =           // ProcessorId;
-    {  // PROCESSOR_SIGNATURE
-      0, //  ProcessorSteppingId:4;
-      0, //  ProcessorModel:  &nbs= p;  4;
-      0, //  ProcessorFamily:  &nb= sp; 4;
-      0, //  ProcessorType:   = ;   2;
-      0, //  ProcessorReserved1: 2;
-      0, //  ProcessorXModel:  &nb= sp; 4;
-      0, //  ProcessorXFamily:   8= ;
-      0, //  ProcessorReserved2: 4;
-    },
-
-    {  // PROCESSOR_FEATURE_FLAGS
-      0, //  ProcessorFpu   &= nbsp;   :1;
-      0, //  ProcessorVme   &= nbsp;   :1;
-      0, //  ProcessorDe   &n= bsp;    :1;
-      0, //  ProcessorPse   &= nbsp;   :1;
-      0, //  ProcessorTsc   &= nbsp;   :1;
-      0, //  ProcessorMsr   &= nbsp;   :1;
-      0, //  ProcessorPae   &= nbsp;   :1;
-      0, //  ProcessorMce   &= nbsp;   :1;
-      0, //  ProcessorCx8   &= nbsp;   :1;
-      0, //  ProcessorApic   =    :1;
-      0, //  ProcessorReserved1 :1;
-      0, //  ProcessorSep   &= nbsp;   :1;
-      0, //  ProcessorMtrr   =    :1;
-      0, //  ProcessorPge   &= nbsp;   :1;
-      0, //  ProcessorMca   &= nbsp;   :1;
-      0, //  ProcessorCmov   =    :1;
-      0, //  ProcessorPat   &= nbsp;   :1;
-      0, //  ProcessorPse36   = ;  :1;
-      0, //  ProcessorPsn   &= nbsp;   :1;
-      0, //  ProcessorClfsh   = ;  :1;
-      0, //  ProcessorReserved2 :1;
-      0, //  ProcessorDs   &n= bsp;    :1;
-      0, //  ProcessorAcpi   =    :1;
-      0, //  ProcessorMmx   &= nbsp;   :1;
-      0, //  ProcessorFxsr   =    :1;
-      0, //  ProcessorSse   &= nbsp;   :1;
-      0, //  ProcessorSse2   =    :1;
-      0, //  ProcessorSs   &n= bsp;    :1;
-      0, //  ProcessorReserved3 :1;
-      0, //  ProcessorTm   &n= bsp;    :1;
-      0, //  ProcessorReserved4 :2;
-    }
+  2,           = ;            &n= bsp;       // ProcessorManufacture String; +  {           =             &nb= sp;        // ProcessorId;
+    { 0x00, 0x00, 0x00, 0x00 },
+    { 0x00, 0x00, 0x00, 0x00 }
   },
   3,          =           // ProcessorVersion = String;
   {          &= nbsp;          // Voltage;
@@ -293,18 +252,31 @@ SMBIOS_TABLE_TYPE4 mProcessorInfoType4 =3D {
   0,          =             // MaxSp= eed;
   0,          =             // Curre= ntSpeed;
   0x41,         &nb= sp;         // Status;
-  ProcessorUpgradeOther,  // ProcessorUpgrade;   =    ///< The enumeration value from PROCESSOR_UPGRADE.
-  0,           = ;           // L1CacheHan= dle;
-  0,           = ;           // L2CacheHan= dle;
-  0,           = ;           // L3CacheHan= dle;
+  ProcessorUpgradeNone,   // ProcessorUpgrade;  &= nbsp;      ///< The enumeration value from PROC= ESSOR_UPGRADE.
+  0xFFFF,          =        // L1CacheHandle;
+  0xFFFF,          =        // L2CacheHandle;
+  0xFFFF,          =        // L3CacheHandle;
   0,          =             // Seria= lNumber;
   0,          =             // Asset= Tag;
   0,          =             // PartN= umber;
   4,          =             // CoreC= ount;
   4,          =             // Enabl= edCoreCount;
   4,          =             // Threa= dCount;
-  0x6C,          &n= bsp;        // ProcessorCharacteristics;=
+  0x6C,          &n= bsp;        // ProcessorCharacteristics;= ///< The enumeration value from PROCESSOR_CHARACTERISTIC_FLAGS
+      // ProcessorReserved1   &nbs= p;          :1;
+      // ProcessorUnknown    =             :1;
+      // Processor64BitCapble   &n= bsp;        :1;
+      // ProcessorMultiCore   &nbs= p;          :1;
+      // ProcessorHardwareThread   = ;      :1;
+      // ProcessorExecuteProtection  &n= bsp;   :1;
+      // ProcessorEnhancedVirtualization :1;
+      // ProcessorPowerPerformanceCtrl  = ;  :1;
+      // Processor128bitCapble   &= nbsp;        :1;
+      // ProcessorReserved2   &nbs= p;           :7;
   ProcessorFamilyARM,     // ARM Processor F= amily;
+  0,           = ;           // CoreCount2= ;
+  0,           = ;           // EnabledCor= eCount2;
+  0,           = ;           // ThreadCoun= t2;
 };
 
 CHAR8 mCpuName[128] =3D "Unknown ARM CPU";
@@ -832,11 +804,15 @@ ProcessorInfoUpdateSmbiosType4 (
   )
 {
   EFI_STATUS Status;
-  UINT32 Rate;
+  UINT32     Rate;
+  UINT64     *ProcessorId;
 
   mProcessorInfoType4.CoreCount =3D (UINT8)MaxCpus;
+  mProcessorInfoType4.CoreCount2 =3D (UINT8)MaxCpus;
   mProcessorInfoType4.EnabledCoreCount =3D (UINT8)MaxCpus;
+  mProcessorInfoType4.EnabledCoreCount2 =3D (UINT8)MaxCpus;
   mProcessorInfoType4.ThreadCount =3D (UINT8)MaxCpus;
+  mProcessorInfoType4.ThreadCount2 =3D (UINT8)MaxCpus;
 
   Status =3D mFwProtocol->GetMaxClockRate (RPI_MBOX_CLOCK_RAT= E_ARM, &Rate);
   if (Status !=3D EFI_SUCCESS) {
@@ -856,6 +832,9 @@ ProcessorInfoUpdateSmbiosType4 (
 
   AsciiStrCpyS (mCpuName, sizeof (mCpuName), mFwProtocol->Get= CpuName (-1));
 
+  ProcessorId =3D (UINT64 *)&(mProcessorInfoType4.ProcessorId); +  *ProcessorId =3D ArmReadMidr();
+
   LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mProcessorInfoTy= pe4, mProcessorInfoType4Strings, NULL);
 }
 
--
2.17.1

--_000_BN6PR05MB34113B5F8CFDC807E6BF725DB97B0BN6PR05MB3411namp_--