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Mon, 11 May 2020 17:02:35 +0000 Received: from BN6PR05MB3411.namprd05.prod.outlook.com ([fe80::f463:db64:43d8:5a0f]) by BN6PR05MB3411.namprd05.prod.outlook.com ([fe80::f463:db64:43d8:5a0f%3]) with mapi id 15.20.3000.016; Mon, 11 May 2020 17:02:35 +0000 From: "Andrei Warkentin" To: Andrei Warkentin , "devel@edk2.groups.io" , "ard.biesheuvel@arm.com" CC: "leif@nuviainc.com" , "pete@akeo.ie" , "philmd@redhat.com" Subject: Re: [edk2-devel] [edk2-platforms][PATCH 1/1] RPi: add Gpio output set/clear functions to GpioLib Thread-Topic: [edk2-devel] [edk2-platforms][PATCH 1/1] RPi: add Gpio output set/clear functions to GpioLib Thread-Index: AQHWJxM1Qv4mepFABU6Lj0IbnAFcuqih2KIAgAFDv6w= Date: Mon, 11 May 2020 17:02:35 +0000 Message-ID: References: <20200510213650.12829-1-andrey.warkentin@gmail.com>,<720059bd-3069-f39b-070a-0c4e0a4e0c8c@arm.com> In-Reply-To: <720059bd-3069-f39b-070a-0c4e0a4e0c8c@arm.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: gmail.com; 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boundary="_000_BN6PR05MB341142B01AF10A9C78B99D0DB9A10BN6PR05MB3411namp_" --_000_BN6PR05MB341142B01AF10A9C78B99D0DB9A10BN6PR05MB3411namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable I was going to have a patch to support power-off using an alternate mechani= sm (not PSCI, but via GPIO for the https://raspberrypiwiki.com/index.php/X7= 35 hat. Ultimately, I decided against complicating UEFI - an OS isn't required to = use UEFI RT today over PSCI (OpenBSD didn't), the memory map becomes more c= omplicated (to cover the RT MMIO for GPIO block). The right place for this = functionality appears to be TF-A, so that's why I just have the GpioLib cha= nge. So in the near future I don't anticipate any changes from me that would us= e this GpioLib functionality, yet it is tested (at the least GpioSet) and w= ould be useful to others to have it. Shall I bail on it entirely? A ________________________________ From: devel@edk2.groups.io on behalf of Ard Biesheu= vel via groups.io Sent: Sunday, May 10, 2020 4:38 PM To: Andrei Warkentin ; devel@edk2.groups.io Cc: leif@nuviainc.com ; pete@akeo.ie ; ph= ilmd@redhat.com Subject: Re: [edk2-devel] [edk2-platforms][PATCH 1/1] RPi: add Gpio output= set/clear functions to GpioLib On 5/10/20 11:36 PM, Andrei Warkentin wrote: > GpioSet and GpioClear. Using hw of course (not mailbox). > > Signed-off-by: Andrei Warkentin Can you add this patch to the series that actually introduces a user for this new functionality? Also, please don't hide unrelated changes in your patches like this. > --- > Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h | 10 +++++ > Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c | 42 ++++++++++++++= +++++- > 2 files changed, 50 insertions(+), 2 deletions(-) > > diff --git a/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h b/Silico= n/Broadcom/Bcm283x/Include/Library/GpioLib.h > index 014c6b07..10c9cdfb 100644 > --- a/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h > +++ b/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h > @@ -24,4 +24,14 @@ GpioPinFuncGet ( > IN UINTN Pin > ); > > +VOID > +GpioSet ( > + IN UINTN Pin > + ); > + > +VOID > +GpioClear ( > + IN UINTN Pin > + ); > + > #endif /* __GPIO_LIB__ */ > diff --git a/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c b/Silico= n/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c > index 542b6e8f..716b05be 100644 > --- a/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c > +++ b/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c > @@ -18,7 +18,7 @@ > > STATIC > VOID > -GpioFSELModify ( > +GpioFSelModify ( > IN UINTN RegIndex, > IN UINT32 ModifyMask, > IN UINT32 FunctionMask > @@ -38,6 +38,44 @@ GpioFSELModify ( > MmioWrite32 (Reg, Val); > } > > +VOID > +GpioSet ( > + IN UINTN Pin > + ) > +{ > + UINT32 Val; > + EFI_PHYSICAL_ADDRESS Reg; > + UINT8 RegIndex =3D Pin / 32; > + UINT8 SelIndex =3D Pin % 32; > + > + Reg =3D RegIndex * sizeof (UINT32) + GPIO_GPSET0; > + > + ASSERT (Reg <=3D GPIO_GPSET1); > + > + Val =3D MmioRead32 (Reg); > + Val |=3D 1 << SelIndex; > + MmioWrite32 (Reg, Val); > +} > + > +VOID > +GpioClear ( > + IN UINTN Pin > + ) > +{ > + UINT32 Val; > + EFI_PHYSICAL_ADDRESS Reg; > + UINT8 RegIndex =3D Pin / 32; > + UINT8 SelIndex =3D Pin % 32; > + > + Reg =3D RegIndex * sizeof (UINT32) + GPIO_GPCLR0; > + > + ASSERT (Reg <=3D GPIO_GPCLR1); > + > + Val =3D MmioRead32 (Reg); > + Val |=3D 1 << SelIndex; > + MmioWrite32 (Reg, Val); > +} > + > VOID > GpioPinFuncSet ( > IN UINTN Pin, > @@ -57,7 +95,7 @@ GpioPinFuncSet ( > > ModifyMask =3D GPIO_FSEL_MASK << (SelIndex * GPIO_FSEL_BITS_PER_PIN)= ; > FunctionMask =3D Function << (SelIndex * GPIO_FSEL_BITS_PER_PIN); > - GpioFSELModify (RegIndex, ModifyMask, FunctionMask); > + GpioFSelModify (RegIndex, ModifyMask, FunctionMask); > } > > UINTN > --_000_BN6PR05MB341142B01AF10A9C78B99D0DB9A10BN6PR05MB3411namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
I was going to have a patch to support power-off using an alternate mechan= ism (not PSCI, but via GPIO for the https://raspberrypiwiki.com/index.php/X735 ha= t.

Ultimately, I decided against complicating UEFI - an OS isn't required to = use UEFI RT today over PSCI (OpenBSD didn't), the memory map becomes more c= omplicated (to cover the RT MMIO for GPIO block). The right place for this = functionality appears to be TF-A, so that's why I just have the GpioLib change.

So in the near future I don't anticipate any changes from me that would us= e this GpioLib functionality, yet it is tested (at the least GpioSet) and w= ould be useful to others to have it. Shall I bail on it entirely?

A
From: devel@edk2.groups.io= <devel@edk2.groups.io> on behalf of Ard Biesheuvel via groups.io <= ;ard.biesheuvel=3Darm.com@groups.io>
Sent: Sunday, May 10, 2020 4:38 PM
To: Andrei Warkentin <andrey.warkentin@gmail.com>; devel@edk2= .groups.io <devel@edk2.groups.io>
Cc: leif@nuviainc.com <leif@nuviainc.com>; pete@akeo.ie <p= ete@akeo.ie>; philmd@redhat.com <philmd@redhat.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH 1/1] RPi: add Gpio= output set/clear functions to GpioLib
 
On 5/10/20 11:36 PM, Andrei Warkentin wrote:
> GpioSet and GpioClear. Using hw of course (not mailbox).
>
> Signed-off-by: Andrei Warkentin <andrey.warkentin@gmail.com>
Can you add this patch to the series that actually introduces a user for <= br> this new functionality?

Also, please don't hide unrelated changes in your patches like this.

> ---
>   Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h | 10 &= #43;++++
>   Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c | 42 &= #43;++++++++++++++&= #43;+++-
>   2 files changed, 50 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h b/Sil= icon/Broadcom/Bcm283x/Include/Library/GpioLib.h
> index 014c6b07..10c9cdfb 100644
> --- a/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h
> +++ b/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h<= br> > @@ -24,4 +24,14 @@ GpioPinFuncGet (
>     IN  UINTN Pin
>     );
>  
> +VOID
> +GpioSet (
> +  IN  UINTN Pin
> +  );
> +
> +VOID
> +GpioClear (
> +  IN  UINTN Pin
> +  );
> +
>   #endif /* __GPIO_LIB__ */
> diff --git a/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c b/Sil= icon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c
> index 542b6e8f..716b05be 100644
> --- a/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c
> +++ b/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c<= br> > @@ -18,7 +18,7 @@
>  
>   STATIC
>   VOID
> -GpioFSELModify (
> +GpioFSelModify (
>     IN  UINTN RegIndex,
>     IN  UINT32 ModifyMask,
>     IN  UINT32 FunctionMask
> @@ -38,6 +38,44 @@ GpioFSELModify (
>     MmioWrite32 (Reg, Val);
>   }
>  
> +VOID
> +GpioSet (
> +  IN  UINTN Pin
> +  )
> +{
> +  UINT32 Val;
> +  EFI_PHYSICAL_ADDRESS Reg;
> +  UINT8 RegIndex =3D Pin / 32;
> +  UINT8 SelIndex =3D Pin % 32;
> +
> +  Reg =3D RegIndex * sizeof (UINT32) + GPIO_GPSET0;
> +
> +  ASSERT (Reg <=3D GPIO_GPSET1);
> +
> +  Val =3D MmioRead32 (Reg);
> +  Val |=3D 1 << SelIndex;
> +  MmioWrite32 (Reg, Val);
> +}
> +
> +VOID
> +GpioClear (
> +  IN  UINTN Pin
> +  )
> +{
> +  UINT32 Val;
> +  EFI_PHYSICAL_ADDRESS Reg;
> +  UINT8 RegIndex =3D Pin / 32;
> +  UINT8 SelIndex =3D Pin % 32;
> +
> +  Reg =3D RegIndex * sizeof (UINT32) + GPIO_GPCLR0;
> +
> +  ASSERT (Reg <=3D GPIO_GPCLR1);
> +
> +  Val =3D MmioRead32 (Reg);
> +  Val |=3D 1 << SelIndex;
> +  MmioWrite32 (Reg, Val);
> +}
> +
>   VOID
>   GpioPinFuncSet (
>     IN  UINTN Pin,
> @@ -57,7 +95,7 @@ GpioPinFuncSet (
>  
>     ModifyMask =3D GPIO_FSEL_MASK << (SelIn= dex * GPIO_FSEL_BITS_PER_PIN);
>     FunctionMask =3D Function << (SelIndex = * GPIO_FSEL_BITS_PER_PIN);
> -  GpioFSELModify (RegIndex, ModifyMask, FunctionMask);
> +  GpioFSelModify (RegIndex, ModifyMask, FunctionMask);
>   }
>  
>   UINTN
>




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