Re: [edk2-devel] [PATCH edk2-platforms v4 7/9] Silicon/Broadcom/BcmGenetDxe: use MemoryFence() for MMIO write ordering

["Andrei Warkentin" <awarkentin@vmware.com>]

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Reviewed-by: Andrei Warkentin <andrey.warkentin@gmail.com>
________________________________
From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Ard Biesheuvel via groups.io <ard.biesheuvel=arm.com@groups.io>
Sent: Monday, May 11, 2020 9:55 AM
To: devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>; Pete Batard <pete@akeo.ie>; Jared McNeill <jmcneill@invisible.ca>; Andrei Warkentin <awarkentin@vmware.com>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>; Jeremy Linton <jeremy.linton@arm.com>
Subject: [edk2-devel] [PATCH edk2-platforms v4 7/9] Silicon/Broadcom/BcmGenetDxe: use MemoryFence() for MMIO write ordering

ARM synchronization barriers can be used to stall execution and wait
for cache or TLB maintenance to complete. TLB maintenance is irrelevant
in the context of the GENET driver, but cache maintenance is important
for non-cache coherent DMA, and synchronization barriers are needed to
ensure that outgoing data is cleaned before starting DMA for TX frames.

However, this cache maintenance is already taken care of by the cache
maintenance routines, and so all we need to do in our I/O routines is
ensure that MMIO writes are issued in the right order, and for this,
an ordinary MemoryFence () is sufficient.

This means we don't need to depend on ArmLib either.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
---
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf | 2 --
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c | 1 -
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c     | 3 +--
 3 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
index 9b3dc5e62ecf..e3e4ebbddb93 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
@@ -27,7 +27,6 @@ [Sources]
   SimpleNetwork.c

 [Packages]
-  ArmPkg/ArmPkg.dec
   EmbeddedPkg/EmbeddedPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
@@ -35,7 +34,6 @@ [Packages]
   Silicon/Broadcom/Drivers/Net/BcmNet.dec

 [LibraryClasses]
-  ArmLib
   BaseLib
   BaseMemoryLib
   DebugLib
diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
index 00fbfbc109bb..630a92ef210b 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
@@ -9,7 +9,6 @@

 **/

-#include <Library/ArmLib.h>
 #include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/MemoryAllocationLib.h>
diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
index 35a3c7abdf1e..e3ce8614aeb2 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
@@ -8,7 +8,6 @@

 #include "GenetUtil.h"

-#include <Library/ArmLib.h>
 #include <Library/DmaLib.h>
 #include <Library/IoLib.h>
 #include <Library/UefiBootServicesTableLib.h>
@@ -64,7 +63,7 @@ GenetMmioWrite (
 {
   ASSERT ((Offset & 3) == 0);

-  ArmDataSynchronizationBarrier ();
+  MemoryFence ();
   MmioWrite32 (Genet->RegBase + Offset, Data);
 }

--
2.17.1





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