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From: Scott Telford <stelford@cadence.com>
To: Leif Lindholm <leif.lindholm@linaro.org>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@ml01.01.org>,
	Graeme Gregory <graeme.gregory@linaro.org>,
	"afish@apple.com" <afish@apple.com>,
	"Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [staging/cadence-aarch64 PATCH v2 5/6] CadencePkg: Add ACPI tables for Cadence CSP platform.
Date: Thu, 22 Jun 2017 09:25:38 +0000	[thread overview]
Message-ID: <BN6PR07MB315486811E46E95824B89BE9CFDB0@BN6PR07MB3154.namprd07.prod.outlook.com> (raw)
In-Reply-To: <20170606111141.GX7556@bivouac.eciton.net>

> -----Original Message-----
> From: Leif Lindholm [mailto:leif.lindholm@linaro.org]
> Sent: 06 June 2017 12:12
> To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Scott Telford <stelford@cadence.com>; edk2-devel@lists.01.org <edk2-
> devel@ml01.01.org>; Graeme Gregory <graeme.gregory@linaro.org>;
> afish@apple.com; Kinney, Michael D <michael.d.kinney@intel.com>
> Subject: Re: [staging/cadence-aarch64 PATCH v2 5/6] CadencePkg: Add ACPI
> tables for Cadence CSP platform.
 
> However, if you want this Cadence UART to be usable as an operating
> system boot console in ACPI systems, you need to get the serial port
> type added to DBG2 (which is explicitly referenced from SPCR):
> https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__msdn.microsoft.com_en-2Dus_library_windows_hardware_dn639131-
> 28v-3Dvs.85-
> 29.aspx&d=DwIBAg&c=aUq983L2pue2FqKFoP6PGHMJQyoJ7kl3s3GZ-
> _haXqY&r=0b2qZ7fqn6FWL0d7Bhx7saDL-
> B7sx3Cxz3HPARO7ozc&m=SLa8mBFqNKP-
> AkMHpGlWJjZ0wbdukQ9J_HJDF_4Wd7o&s=1QAszB3f1u_Zpzh4ZD-
> YJzK9rtZJktnrFm9j23oaQeU&e=
> 
> Is this something you would be interested in doing? I could probably
> dig up the required contacts if that was the case.
> 
> (You would then also need to add some matching code in
> linux/drivers/tty/serial/xilinx_uartps.c, to get it autodetected by
> Linux.)

Thanks for the offer, but we only used a Cadence UART in this platform because we didn't have the ARM PL011 IP available to us when we started working on this (we do now). I doubt anyone else will want to use this UART in an SBSA or similar system, so I'll just drop SPCR.

Regards,
Scott.


  reply	other threads:[~2017-06-22  9:24 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-05 10:50 [staging/cadence-aarch64 PATCH v2 0/6] CadencePkg: Add package for Cadence hardware IP support Scott Telford
2017-06-05 10:50 ` [staging/cadence-aarch64 PATCH v2 1/6] CadencePkg: Add libraries for Cadence CSP platform Scott Telford
2017-06-05 15:12   ` Ard Biesheuvel
2017-06-05 17:19     ` Leif Lindholm
2017-06-22  9:24     ` Scott Telford
2017-06-05 17:11   ` Leif Lindholm
2017-06-22  9:24     ` Scott Telford
2017-06-05 10:50 ` [staging/cadence-aarch64 PATCH v2 2/6] CadencePkg: Add library for Cadence UART Scott Telford
2017-06-06 10:00   ` Leif Lindholm
2017-06-05 10:50 ` [staging/cadence-aarch64 PATCH v2 3/6] CadencePkg: Add PCI host bridge library for Cadence PCIe Root Complex Scott Telford
2017-06-05 15:25   ` Ard Biesheuvel
2017-06-22  9:24     ` Scott Telford
2017-06-05 17:08   ` Leif Lindholm
2017-06-05 10:50 ` [staging/cadence-aarch64 PATCH v2 4/6] CadencePkg: Add SEC phase implementation for Cadence CSP platform Scott Telford
2017-06-06 10:52   ` Leif Lindholm
2017-06-22  9:24     ` Scott Telford
2017-06-05 10:50 ` [staging/cadence-aarch64 PATCH v2 5/6] CadencePkg: Add ACPI tables " Scott Telford
2017-06-05 15:40   ` Ard Biesheuvel
2017-06-06 11:11     ` Leif Lindholm
2017-06-22  9:25       ` Scott Telford [this message]
2017-06-22  9:26     ` Scott Telford
2017-06-05 10:50 ` [staging/cadence-aarch64 PATCH v2 6/6] CadencePkg: Add .dsc, .fdf and .dec files " Scott Telford
2017-06-06 11:37   ` Leif Lindholm
2017-06-22  9:26     ` Scott Telford
2017-06-29 16:15       ` Leif Lindholm
2017-07-19 16:06         ` Scott Telford

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