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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Heng, Please see comments inline. Thanks, Nate > -----Original Message----- > From: Luo, Heng > Sent: Sunday, January 31, 2021 5:37 PM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Desimone, > Nathaniel L > Subject: [PATCH 35/40] TigerlakeSiliconPkg/Fru/TglCpu: Add CpuPcieRp and > Vtd library instances >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3171 >=20 > Adds the following files: > * Fru/TglCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib > * Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdInitLib >=20 > Cc: Sai Chaganty > Cc: Nate DeSimone > Signed-off-by: Heng Luo > --- >=20 > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSmm > CpuPcieInfoFruLib/CpuPcieInfoFruLib.c | 81 > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++ >=20 > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSmm > CpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf | 36 > ++++++++++++++++++++++++++++++++++++ >=20 > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdIni= tLi > b/DxeVtdInitFruLib.c | 18 ++++++++++++++++++ >=20 > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdIni= tLi > b/DxeVtdInitFruLib.inf | 39 > +++++++++++++++++++++++++++++++++++++++ > 4 files changed, 174 insertions(+) >=20 > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSm > mCpuPcieInfoFruLib/CpuPcieInfoFruLib.c > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSm > mCpuPcieInfoFruLib/CpuPcieInfoFruLib.c > new file mode 100644 > index 0000000000..6a9bc89ecf > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSm > mCpuPcieInfoFruLib/CpuPcieInfoFruLib.c > @@ -0,0 +1,81 @@ > +/** @file >=20 > + CPU PCIe information library. >=20 > + >=20 > + All function in this library is available for PEI, DXE, and SMM, >=20 > + But do not support UEFI RUNTIME environment call. >=20 > + >=20 > + Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > + SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +**/ >=20 > +#include >=20 > +#include >=20 > +#include >=20 > +#include >=20 > +#include >=20 > +#include >=20 > +#include >=20 > +#include >=20 > +#include >=20 > +#include >=20 > + >=20 > +/** >=20 > + Get Maximum CPU Pcie Root Port Number >=20 > + >=20 > + @retval Maximum CPU Pcie Root Port Number >=20 > +**/ >=20 > +UINT8 >=20 > +GetMaxCpuPciePortNum ( >=20 > + VOID >=20 > + ) >=20 > +{ >=20 > + return CPU_PCIE_ULT_ULX_MAX_ROOT_PORT; >=20 > +} >=20 > + >=20 > +/** >=20 > + Get CPU Pcie Root Port Device and Function Number by Root Port physica= l > Number >=20 > + >=20 > + @param[in] RpNumber Root port physical number. (0-based) >=20 > + @param[out] RpDev Return corresponding root port devic= e > number. >=20 > + @param[out] RpFun Return corresponding root port funct= ion > number. >=20 > + >=20 > + @retval EFI_SUCCESS Root port device and function is ret= rieved >=20 > + @retval EFI_INVALID_PARAMETER RpNumber is invalid >=20 > +**/ >=20 > +EFI_STATUS >=20 > +EFIAPI >=20 > +GetCpuPcieRpDevFun ( >=20 > + IN UINTN RpNumber, >=20 > + OUT UINTN *RpDev, >=20 > + OUT UINTN *RpFun >=20 > + ) >=20 > +{ >=20 > + if (RpNumber > GetMaxCpuPciePortNum ()) { >=20 > + DEBUG ((DEBUG_ERROR, "GetCpuPcieRpDevFun invalid RpNumber %x", > RpNumber)); >=20 > + ASSERT (FALSE); >=20 > + return EFI_INVALID_PARAMETER; >=20 > + } >=20 > + // >=20 > + // For TGL - U/Y only one CPU PCIE Root port is present >=20 > + // >=20 > + *RpDev =3D 6; >=20 > + *RpFun =3D 0; >=20 > + return EFI_SUCCESS; >=20 > +} >=20 > +/** >=20 > + >=20 > + Gets pci segment base address of PCIe root port. >=20 > + >=20 > + @param RpIndex Root Port Index (0 based) >=20 > + >=20 > + @return PCIe port base address. >=20 > +**/ >=20 > +UINT64 >=20 > +CpuPcieBase ( >=20 > + IN UINT32 RpIndex >=20 > + ) >=20 > +{ >=20 > + UINTN RpDevice; >=20 > + UINTN RpFunction; >=20 > + GetCpuPcieRpDevFun (RpIndex, &RpDevice, &RpFunction); >=20 > + return PCI_SEGMENT_LIB_ADDRESS (SA_SEG_NUM, SA_MC_BUS, > (UINT32) RpDevice, (UINT32) RpFunction, 0); >=20 > +} >=20 > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSm > mCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSm > mCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf > new file mode 100644 > index 0000000000..b6a40b2f7c > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSm > mCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf > @@ -0,0 +1,36 @@ > +## @file >=20 > +# CPU PCIe information library for TigerLake PCH. >=20 > +# >=20 > +# All function in this library is available for PEI, DXE, and SMM, >=20 > +# But do not support UEFI RUNTIME environment call. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > + >=20 > +[Defines] >=20 > +INF_VERSION =3D 0x00010017 >=20 > +BASE_NAME =3D PeiDxeSmmCpuPcieInfoFruLib >=20 > +FILE_GUID =3D 59CA5352-ED46-4449-BF1C-0D0074C4D5B1 >=20 > +VERSION_STRING =3D 1.0 >=20 > +MODULE_TYPE =3D BASE >=20 > +LIBRARY_CLASS =3D CpuPcieInfoFruLib >=20 > + >=20 > + >=20 > +[LibraryClasses] >=20 > +IoLib >=20 > +BaseLib >=20 > +DebugLib >=20 > +PrintLib >=20 > +PcdLib >=20 > +ConfigBlockLib >=20 > +CpuPcieInitCommonLib >=20 > + >=20 > +[Packages] >=20 > +MdePkg/MdePkg.dec >=20 > +TigerlakeSiliconPkg/SiPkg.dec >=20 > + >=20 > +[Sources] >=20 > +CpuPcieInfoFruLib.c >=20 > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdI= nit > Lib/DxeVtdInitFruLib.c > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdI= nit > Lib/DxeVtdInitFruLib.c > new file mode 100644 > index 0000000000..8a0a8b6335 > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdI= nit > Lib/DxeVtdInitFruLib.c > @@ -0,0 +1,18 @@ > +/** @file >=20 > + DXE Flu Library to initialize Vtd DXE FRU Library to initialize Vtd >=20 > + >=20 > + Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > + SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +**/ >=20 > +#include >=20 > + >=20 > +/** >=20 > + For device that specified by Device Num and Function Num, >=20 > + mDevEnMap is used to check device presence. >=20 > + 0x80 means use Device ID to detemine presence >=20 > + 0x8F means force to update >=20 > + >=20 > + The structure is used to check if device scope is valid when update DM= AR > table >=20 > +**/ >=20 > +UINT16 mDevEnMap[][2] =3D {{0x0200, 0x80}, {0x0500, 0x80}, {0x1400, 0x8= 0}, > {0x1401, 0x80}, {0x0700, 0x80}, {0x0701, 0x80}, {0x0702, 0x80}, {0x0703, = 0x80}, > {0x1302, 0x8F}, {0x1303, 0x8F}}; >=20 > +UINTN mDevEnMapSize =3D sizeof (mDevEnMap) / (sizeof (UINT16) * 2); >=20 > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdI= nit > Lib/DxeVtdInitFruLib.inf > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdI= nit > Lib/DxeVtdInitFruLib.inf > new file mode 100644 > index 0000000000..e0aa88f68a > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdI= nit > Lib/DxeVtdInitFruLib.inf > @@ -0,0 +1,39 @@ > +## @file >=20 > +# Library description file for DXE Phase Vtd Init >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > + >=20 > +[Defines] >=20 > +INF_VERSION =3D 0x00010017 >=20 > +BASE_NAME =3D DxeVtdInitFruLib >=20 > +FILE_GUID =3D 18690D67-08A9-4DCE-B62D-CBE3AF7CFEE7 >=20 > +VERSION_STRING =3D 1.0 >=20 > +MODULE_TYPE =3D DXE_DRIVER >=20 > +LIBRARY_CLASS =3D DxeVtdFruLib >=20 > + >=20 > + >=20 > +[LibraryClasses] >=20 > +UefiLib >=20 > +UefiRuntimeServicesTableLib >=20 > +UefiBootServicesTableLib >=20 > +DebugLib >=20 > +DxeSaPolicyLib >=20 > + >=20 > +[Packages] >=20 > +MdePkg/MdePkg.dec >=20 > +TigerlakeSiliconPkg/SiPkg.dec >=20 > + >=20 > +[Protocols] >=20 > +gSaNvsAreaProtocolGuid ## CONSUMES >=20 > + >=20 > +[Sources] >=20 > +DxeVtdInitFruLib.c >=20 > + >=20 > +[FixedPcd] >=20 > + >=20 > +[Guids] >=20 > +gTcssHobGuid ## CONSUMES >=20 > -- > 2.24.0.windows.2