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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone > -----Original Message----- > From: Luo, Heng > Sent: Sunday, January 31, 2021 5:37 PM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Desimone, > Nathaniel L > Subject: [PATCH 38/40] TigerlakeSiliconPkg/Fru: Add Fru DSC files >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3171 >=20 > Adds the following DSC files: > * Fru/TglCpu > * Fru/TglPch >=20 > Cc: Sai Chaganty > Cc: Nate DeSimone > Signed-off-by: Heng Luo > --- > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc | 11 > +++++++++++ > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc | 9 ++++++++= + > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/DxeLib.dsc | 20 > ++++++++++++++++++++ > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc | 8 ++++++++ > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc | 7 +++++++ > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/CommonLib.dsc | 30 > ++++++++++++++++++++++++++++++ > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc | 9 ++++++++= + > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/DxeLib.dsc | 13 > +++++++++++++ > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc | 8 ++++++++ > Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc | 10 ++++++++= ++ > 10 files changed, 125 insertions(+) >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc > new file mode 100644 > index 0000000000..99ee0eccac > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc > @@ -0,0 +1,11 @@ > +## @file >=20 > +# Component description file for the TigerLake CPU Common FRU libraries= . >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > +VtdInfoLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Vtd/Library/PeiDxeSmmVt > dInfoLib/PeiDxeSmmVtdInfoLib.inf >=20 > +CpuPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/CpuPcieRp/Library/PeiD > xeSmmCpuPcieRpLib/PeiDxeSmmCpuPcieRpLib.inf >=20 > +CpuPcieInfoFruLib|$(PLATFORM_SI_PACKAGE)/Fru/TglCpu/CpuPcieRp/Libr > ary/PeiDxeSmmCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc > new file mode 100644 > index 0000000000..874e4cbaad > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc > @@ -0,0 +1,9 @@ > +## @file >=20 > +# Component description file for the Tigerlake CPU DXE FRU drivers. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > + >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/DxeLib.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/DxeLib.dsc > new file mode 100644 > index 0000000000..5c72c2ac61 > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/DxeLib.dsc > @@ -0,0 +1,20 @@ > +## @file >=20 > +# Component description file for the Tigerlake CPU DXE FRU libraries. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > +DxeGraphicsPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Graphics/Librar > yPrivate/DxeGraphicsPolicyLib/DxeGraphicsPolicyLib.inf >=20 > +DxeGraphicsInitLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Graphics/LibraryPr > ivate/DxeGraphicsInitLib/DxeGraphicsInitLib.inf >=20 > +DxeIgdOpRegionInitLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Graphics/Libra > ryPrivate/DxeIgdOpRegionInitLib/DxeIgdOpRegionInitLib.inf >=20 > +DxeVtdInitLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Vtd/LibraryPrivate/Dxe > VtdInitLib/DxeVtdInitLib.inf >=20 > +DxeVtdPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Vtd/LibraryPrivate/D > xeVtdPolicyLib/DxeVtdPolicyLib.inf >=20 > +DxeVtdInitFruLib|$(PLATFORM_SI_PACKAGE)/Fru/TglCpu/Vtd/LibraryPriva > te/DxeVtdInitLib/DxeVtdInitFruLib.inf >=20 > + >=20 > + >=20 > +# >=20 > +# CPU PCIe IpBlock >=20 > +# >=20 > +DxeCpuPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/CpuPcieRp/LibraryP > rivate/DxeCpuPcieRpLib/DxeCpuPcieRpLib.inf >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc > new file mode 100644 > index 0000000000..de8288364a > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc > @@ -0,0 +1,8 @@ > +## @file >=20 > +# Component description file for the Tigerlake CPU PEI FRU drivers. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc > new file mode 100644 > index 0000000000..5355ecb288 > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc > @@ -0,0 +1,7 @@ > +## @file >=20 > +# Component description file for the Tigerlake CPU PEI FRU ibraries. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/CommonLib.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/CommonLib.dsc > new file mode 100644 > index 0000000000..b7ba1f752c > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/CommonLib.dsc > @@ -0,0 +1,30 @@ > +## @file >=20 > +# Component description file for the Tigerlake PCH Common FRU libraries= . >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > + > PsfLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Psf/LibraryPrivate/PsfLib/PeiDxe > SmmPsfLibVer2.inf >=20 > + > PchPcrLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/Library/PeiDxeSmmPch > PcrLib/PeiDxeSmmPchPcrLib.inf >=20 > + > PchSbiAccessLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/LibraryPrivate/P > eiDxeSmmPchSbiAccessLib/PeiDxeSmmPchSbiAccessLib.inf >=20 > + > GbeMdiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gbe/LibraryPrivate/PeiDxe > SmmGbeMdiLib/PeiDxeSmmGbeMdiLib.inf >=20 > + > GbeLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gbe/Library/PeiDxeSmmGbeLi > b/PeiDxeSmmGbeLib.inf >=20 > + > EspiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Espi/Library/PeiDxeSmmEspiLib > /PeiDxeSmmEspiLib.inf >=20 > + > PmcLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/Library/PeiDxeSmmPmcLi > b/PeiDxeSmmPmcLib.inf >=20 > + > PmcPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/LibraryPrivate/PeiD > xeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf >=20 > + > PmcPrivateLibWithS3|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/LibraryPriva > te/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibWithS3.inf >=20 > + > SpiCommonLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/LibraryPrivate/Base > SpiCommonLib/BaseSpiCommonLib.inf >=20 > + > GpioLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/Library/PeiDxeSmmGpio > Lib/PeiDxeSmmGpioLib.inf >=20 > + > GpioPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/Pei > DxeSmmGpioPrivateLib/PeiDxeSmmGpioPrivateLibVer2.inf >=20 > + > GpioCheckConflictLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/Library/Bas > eGpioCheckConflictLib/BaseGpioCheckConflictLib.inf >=20 > + > PchDmiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PchDmi/LibraryPrivate/PeiD > xeSmmPchDmiLib/PeiDxeSmmPchDmiLib.inf >=20 > + > PchDmiWithS3Lib|$(PLATFORM_SI_PACKAGE)/IpBlock/PchDmi/LibraryPrivat > e/PeiDxeSmmPchDmiLib/PeiDxeSmmPchDmiWithS3Lib.inf >=20 > + > SataLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Sata/Library/PeiDxeSmmSataLi > b/PeiDxeSmmSataLibVer2.inf >=20 > + > SpiAccessLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/Library/PeiDxeSmmSp > iAccessLib/PeiDxeSmmSpiAccessLib.inf >=20 > + > SpiAccessPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/LibraryPrivate/ > PeiDxeSmmSpiAccessPrivateLib/PeiDxeSmmSpiAccessPrivateLib.inf >=20 > + > PchPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/Library/PeiDxeSm > mPchPcieRpLib/PeiDxeSmmPchPcieRpLibVer2.inf >=20 > + > PcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/LibraryPrivate/PcieCli > entRpLib/PcieClientRpLib.inf >=20 > + > PciExpressHelpersLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/LibraryPri > vate/PciExpressHelpersLibrary/PeiDxeSmmPciExpressHelpersLib.inf >=20 > + > BasePcieHelperLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/Library/Base > PcieHelperLib/BasePcieHelperLib.inf >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc > new file mode 100644 > index 0000000000..9fefc6b4c9 > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc > @@ -0,0 +1,9 @@ > +## @file >=20 > +# Component description file for the Tigerlake PCH DXE FRU drivers. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > +$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/Smm/SpiSmm.inf >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/DxeLib.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/DxeLib.dsc > new file mode 100644 > index 0000000000..e9be448baa > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/DxeLib.dsc > @@ -0,0 +1,13 @@ > +## @file >=20 > +# Component description file for the Tigerlake PCH DXE FRU libraries. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + > DxeHdaNhltLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Hda/Library/DxeHdaNh > ltLib/DxeHdaNhltLib.inf >=20 > + > DxeHdaPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Hda/LibraryPrivate/Dx > eHdaPolicyLib/DxeHdaPolicyLib.inf >=20 > + > GpioHelpersLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/Ba > seGpioHelpersLibNull/BaseGpioHelpersLibNull.inf >=20 > + > GpioNameBufferLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivat > e/DxeGpioNameBufferLib/DxeGpioNameBufferLib.inf >=20 > + > DxeGpioPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/ > DxeGpioPolicyLib/DxeGpioPolicyLib.inf >=20 > + > DxePchPcieRpPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/LibraryP > rivate/DxePchPcieRpPolicyLib/DxePchPcieRpPolicyLib.inf >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc > new file mode 100644 > index 0000000000..2eacbe905c > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc > @@ -0,0 +1,8 @@ > +## @file >=20 > +# Component description file for the Tigerlake PCH PEI FRU drivers. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc > b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc > new file mode 100644 > index 0000000000..d8e6313084 > --- /dev/null > +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc > @@ -0,0 +1,10 @@ > +## @file >=20 > +# Component description file for the Tigerlake PCH PEI FRU libraries. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > + > GpioHelpersLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/Pe > iGpioHelpersLib/PeiGpioHelpersLib.inf >=20 > + > GpioNameBufferLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivat > e/PeiGpioNameBufferLib/PeiGpioNameBufferLib.inf >=20 > -- > 2.24.0.windows.2