* Re: [edk2-devel] [edk2-platforms] [PATCH V1 00/18] Reinstate Purley MinPlatform
[not found] <167DFA2F7C18CAAE.22212@groups.io>
@ 2021-05-15 1:30 ` Nate DeSimone
0 siblings, 0 replies; only message in thread
From: Nate DeSimone @ 2021-05-15 1:30 UTC (permalink / raw)
To: devel@edk2.groups.io, Desimone, Nathaniel L
Cc: Chiu, Chasel, Kinney, Michael D, Oram, Isaac W, Abbas, Mohamed,
Michael Kubacki, Bobroff, Zachary, DOPPALAPUDI, HARIKRISHNA
The series has been pushed as 26737930~..eeaa7b7
Thanks,
Nate
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, May 11, 2021 2:48 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; Abbas, Mohamed <mohamed.abbas@intel.com>; Michael Kubacki <michael.kubacki@microsoft.com>; Bobroff, Zachary <zacharyb@ami.com>; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>
Subject: [edk2-devel] [edk2-platforms] [PATCH V1 00/18] Reinstate Purley MinPlatform
This patch series revives the PurleyOpenBoardPkg. The package has been
upgraded to support the newest MinPlatformPkg and the new advanced
feature architecture. Build issues with the newest EDK II have been
fixed. Finally, I believe most (if not all) MinPlatform Architecture
violations have been fixed. The build system has been converted from
the legacy .bat scripts to the new Python build infrastructure.
For silicon code, I have consolidated PurleyRcPkg, PurleySktPkg,
and LewisburgPkg into a single PurleyRefreshSiliconPkg for consistency
with the other MinPlatform board port's silicon packages. In addition,
the silicon code has been upgraded to a newer version with support
for the 2nd Generation Xeon Scalable "Cascade Lake" processors.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Mike Kinney <michael.d.kinney@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Mohamed Abbas <mohamed.abbas@intel.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Cc: Zachary Bobroff <zacharyb@ami.com>
Cc: Harikrishna Doppalapudi <harikrishnad@ami.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Nate DeSimone (18):
PurleyRefreshSiliconPkg: Add DEC and DSC files.
PurleyRefreshSiliconPkg/Pch: Add Register Header Files
PurleyRefreshSiliconPkg/Pch: Add Public Header Files
PurleyRefreshSiliconPkg/Pch: Add Private Header Files
PurleyRefreshSiliconPkg/Pch: Add libraries
PurleyRefreshSiliconPkg/Pch: Add ACPI tables
PurleyRefreshSiliconPkg: Add Uncore files
PurleyOpenBoardPkg: Add includes and libraries
PurleyOpenBoardPkg: Add modules
PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Add PlatformPciTree_WFP.asi
PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Add PCxx.asi files
PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Add ASL files
PurleyOpenBoardPkg/Acpi: Add BoardAcpiDxe
PurleyOpenBoardPkg: Add MtOlympus build files
PurleyOpenBoardPkg: Add StructureConfig.dsc
PurleyOpenBoardPkg: Add BoardMtOlympus
Readme.md: Add PurleyOpenBoardPkg
Maintainers.txt: Add PurleyOpenBoardPkg and PurleyRefreshSiliconPkg
Maintainers.txt | 10 +
.../Acpi/BoardAcpiDxe/AmlOffsetTable.c | 290 +
.../Acpi/BoardAcpiDxe/BoardAcpiDxe.c | 547 ++
.../Acpi/BoardAcpiDxe/BoardAcpiDxe.h | 82 +
.../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf | 71 +
.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c | 516 ++
.../Acpi/BoardAcpiDxe/Dsdt.inf | 29 +
.../Acpi/BoardAcpiDxe/Dsdt/AMLUPD.asl | 19 +
.../Acpi/BoardAcpiDxe/Dsdt/CommonPlatform.asi | 227 +
.../Acpi/BoardAcpiDxe/Dsdt/DSDT.asl | 77 +
.../Acpi/BoardAcpiDxe/Dsdt/Gpe.asl | 134 +
.../Acpi/BoardAcpiDxe/Dsdt/HostBus.asl | 256 +
.../Dsdt/IioPcieHotPlugGpeHandler.asl | 842 ++
.../Dsdt/IioPcieRootPortHotPlug.asl | 686 ++
.../Acpi/BoardAcpiDxe/Dsdt/Itss.asl | 32 +
.../Acpi/BoardAcpiDxe/Dsdt/Mother.asi | 202 +
.../Acpi/BoardAcpiDxe/Dsdt/Os.asi | 145 +
.../Acpi/BoardAcpiDxe/Dsdt/PC00.asi | 385 +
.../Acpi/BoardAcpiDxe/Dsdt/PC01.asi | 255 +
.../Acpi/BoardAcpiDxe/Dsdt/PC02.asi | 255 +
.../Acpi/BoardAcpiDxe/Dsdt/PC03.asi | 260 +
.../Acpi/BoardAcpiDxe/Dsdt/PC04.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC05.asi | 233 +
.../Acpi/BoardAcpiDxe/Dsdt/PC06.asi | 328 +
.../Acpi/BoardAcpiDxe/Dsdt/PC06Ejd.asi | 9 +
.../Acpi/BoardAcpiDxe/Dsdt/PC07.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC08.asi | 262 +
.../Acpi/BoardAcpiDxe/Dsdt/PC09.asi | 260 +
.../Acpi/BoardAcpiDxe/Dsdt/PC10.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC11.asi | 231 +
.../Acpi/BoardAcpiDxe/Dsdt/PC12.asi | 324 +
.../Acpi/BoardAcpiDxe/Dsdt/PC12Ejd.asi | 9 +
.../Acpi/BoardAcpiDxe/Dsdt/PC13.asi | 256 +
.../Acpi/BoardAcpiDxe/Dsdt/PC14.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC15.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC16.asi | 231 +
.../Acpi/BoardAcpiDxe/Dsdt/PC17.asi | 231 +
.../Acpi/BoardAcpiDxe/Dsdt/PC18.asi | 342 +
.../Acpi/BoardAcpiDxe/Dsdt/PC18Ejd.asi | 9 +
.../Acpi/BoardAcpiDxe/Dsdt/PC19.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC20.asi | 260 +
.../Acpi/BoardAcpiDxe/Dsdt/PC21.asi | 260 +
.../Acpi/BoardAcpiDxe/Dsdt/PC22.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC23.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC24.asi | 231 +
.../Acpi/BoardAcpiDxe/Dsdt/PC25.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC26.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC27.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC28.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC29.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC30.asi | 256 +
.../Acpi/BoardAcpiDxe/Dsdt/PC31.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC32.asi | 260 +
.../Acpi/BoardAcpiDxe/Dsdt/PC33.asi | 260 +
.../Acpi/BoardAcpiDxe/Dsdt/PC34.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC35.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC36.asi | 257 +
.../Acpi/BoardAcpiDxe/Dsdt/PC37.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC38.asi | 260 +
.../Acpi/BoardAcpiDxe/Dsdt/PC39.asi | 260 +
.../Acpi/BoardAcpiDxe/Dsdt/PC40.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC41.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC42.asi | 290 +
.../Acpi/BoardAcpiDxe/Dsdt/PC43.asi | 259 +
.../Acpi/BoardAcpiDxe/Dsdt/PC44.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC45.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC46.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/PC47.asi | 232 +
.../Acpi/BoardAcpiDxe/Dsdt/Pch.asi | 10 +
.../Acpi/BoardAcpiDxe/Dsdt/PchApic.asi | 17 +
.../Acpi/BoardAcpiDxe/Dsdt/PchEhci1.asi | 91 +
.../Acpi/BoardAcpiDxe/Dsdt/PchEhci2.asi | 92 +
.../Acpi/BoardAcpiDxe/Dsdt/PchGbe.asl | 17 +
.../Acpi/BoardAcpiDxe/Dsdt/PchLpc.asi | 22 +
.../Acpi/BoardAcpiDxe/Dsdt/PchSata.asi | 807 ++
.../Acpi/BoardAcpiDxe/Dsdt/PchXhci.asi | 329 +
.../Acpi/BoardAcpiDxe/Dsdt/PciCrs.asi | 312 +
.../Acpi/BoardAcpiDxe/Dsdt/PciIrq.asi | 455 +
.../Acpi/BoardAcpiDxe/Dsdt/PcieHp.asi | 644 ++
.../Acpi/BoardAcpiDxe/Dsdt/PcieHpDev.asi | 14 +
.../Acpi/BoardAcpiDxe/Dsdt/PcieNonHpDev.asi | 16 +
.../Acpi/BoardAcpiDxe/Dsdt/PcieSeg.asi | 355 +
.../Acpi/BoardAcpiDxe/Dsdt/Platform.asl | 79 +
.../Acpi/BoardAcpiDxe/Dsdt/PlatformGpe.asi | 78 +
.../BoardAcpiDxe/Dsdt/PlatformPciTree_WFP.asi | 8070 +++++++++++++++++
.../Acpi/BoardAcpiDxe/Dsdt/Sck1Ejd.asi | 9 +
.../Acpi/BoardAcpiDxe/Dsdt/Sck2Ejd.asi | 9 +
.../Acpi/BoardAcpiDxe/Dsdt/Sck3Ejd.asi | 9 +
.../Acpi/BoardAcpiDxe/Dsdt/Uncore0.asi | 33 +
.../Acpi/BoardAcpiDxe/Dsdt/Uncore1.asi | 175 +
.../Acpi/BoardAcpiDxe/Dsdt/Uncore2.asi | 125 +
.../Acpi/BoardAcpiDxe/Dsdt/Uncore3.asi | 98 +
.../Acpi/BoardAcpiDxe/Dsdt/WFPPlatform.asl | 189 +
.../BoardMtOlympus/GitEdk2MinMtOlympus.bat | 74 +
.../BasePlatformHookLib/BasePlatformHookLib.c | 292 +
.../BasePlatformHookLib.inf | 36 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.c | 35 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 40 +
.../BoardAcpiLib/DxeMtOlympusAcpiTableLib.c | 52 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 61 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 41 +
.../BoardAcpiLib/SmmMtOlympusAcpiEnableLib.c | 36 +
.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 119 +
.../Library/BoardInitLib/AllLanesEparam.c | 43 +
.../Library/BoardInitLib/GpioTable.c | 296 +
.../Library/BoardInitLib/IioBifur.c | 88 +
.../BoardInitLib/PeiBoardInitPostMemLib.c | 45 +
.../BoardInitLib/PeiBoardInitPostMemLib.inf | 37 +
.../BoardInitLib/PeiBoardInitPreMemLib.c | 111 +
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 69 +
.../Library/BoardInitLib/PeiMtOlympusDetect.c | 27 +
.../BoardInitLib/PeiMtOlympusInitLib.h | 17 +
.../BoardInitLib/PeiMtOlympusInitPostMemLib.c | 85 +
.../BoardInitLib/PeiMtOlympusInitPreMemLib.c | 614 ++
.../Library/BoardInitLib/UsbOC.c | 45 +
.../BoardMtOlympus/OpenBoardPkg.dsc | 221 +
.../BoardMtOlympus/OpenBoardPkg.fdf | 589 ++
.../BoardMtOlympus/PlatformPkgBuildOption.dsc | 81 +
.../BoardMtOlympus/PlatformPkgConfig.dsc | 58 +
.../BoardMtOlympus/PlatformPkgPcd.dsc | 389 +
.../BoardMtOlympus/StructureConfig.dsc | 6203 +++++++++++++
.../PurleyOpenBoardPkg/BoardMtOlympus/bld.bat | 138 +
.../BoardMtOlympus/build_board.py | 177 +
.../BoardMtOlympus/build_config.cfg | 32 +
.../BoardMtOlympus/logo.txt | 11 +
.../BoardMtOlympus/postbuild.bat | 95 +
.../BoardMtOlympus/prebuild.bat | 197 +
.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.c | 362 +
.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf | 40 +
.../Features/Ipmi/Library/IpmiLibKcs/KcsBmc.c | 485 +
.../Features/Ipmi/Library/IpmiLibKcs/KcsBmc.h | 208 +
.../IpmiPlatformHookLib/IpmiPlatformHookLib.c | 39 +
.../IpmiPlatformHookLib.inf | 28 +
.../Include/Acpi/GlobalNvs.asi | 282 +
.../Include/Acpi/GlobalNvsAreaDef.h | 128 +
.../Include/Guid/PchRcVariable.h | 414 +
.../Include/Guid/SetupVariable.h | 539 ++
.../Include/IioBifurcationSlotTable.h | 100 +
.../PurleyOpenBoardPkg/Include/Platform.h | 92 +
.../Include/Ppi/SystemBoard.h | 63 +
.../Include/Protocol/PciIovPlatform.h | 70 +
.../PurleyOpenBoardPkg/Include/SetupTable.h | 21 +
.../PurleyOpenBoardPkg/Include/SioRegs.h | 35 +
.../Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec | 141 +
.../DxePlatformBootManagerLib/BdsPlatform.c | 1354 +++
.../DxePlatformBootManagerLib/BdsPlatform.h | 184 +
.../DxePlatformBootManagerLib.inf | 96 +
.../DxePlatformBootManagerLib/MemoryTest.c | 85 +
.../PlatformBootOption.c | 559 ++
.../Pci/PciPlatform/IoApic.h | 22 +
.../Pci/PciPlatform/PciIovPlatformPolicy.c | 96 +
.../Pci/PciPlatform/PciIovPlatformPolicy.h | 51 +
.../Pci/PciPlatform/PciPlatform.c | 183 +
.../Pci/PciPlatform/PciPlatform.h | 201 +
.../Pci/PciPlatform/PciPlatform.inf | 70 +
.../Pci/PciPlatform/PciPlatformHooks.c | 527 ++
.../Pci/PciPlatform/PciPlatformHooks.h | 24 +
.../Pci/PciPlatform/PciSupportLib.c | 103 +
.../Pci/PciPlatform/PciSupportLib.h | 44 +
.../Policy/IioUdsDataDxe/IioUdsDataDxe.c | 86 +
.../Policy/IioUdsDataDxe/IioUdsDataDxe.h | 81 +
.../Policy/IioUdsDataDxe/IioUdsDataDxe.inf | 36 +
.../SiliconPolicyInitLib.c | 130 +
.../SiliconPolicyInitLib.inf | 39 +
.../PchPolicyUpdateUsb.c | 99 +
.../SiliconPolicyUpdateLib.c | 659 ++
.../SiliconPolicyUpdateLib.inf | 54 +
.../PlatformCpuPolicy/PlatformCpuPolicy.c | 654 ++
.../PlatformCpuPolicy/PlatformCpuPolicy.inf | 80 +
.../Policy/S3NvramSave/S3NvramSave.c | 256 +
.../Policy/S3NvramSave/S3NvramSave.h | 31 +
.../Policy/S3NvramSave/S3NvramSave.inf | 59 +
.../Policy/SystemBoard/SystemBoardCommon.c | 625 ++
.../Policy/SystemBoard/SystemBoardPei.c | 255 +
.../Policy/SystemBoard/SystemBoardPei.h | 182 +
.../Policy/SystemBoard/SystemBoardPei.inf | 76 +
Platform/Intel/Readme.md | 34 +
Platform/Intel/build.cfg | 1 +
Readme.md | 1 +
.../Iio/Include/Protocol/IioSystem.h | 58 +
.../Include/Guid/MemoryConfigData.h | 19 +
.../Include/Guid/MemoryMapData.h | 74 +
.../Include/Guid/PartialMirrorGuid.h | 59 +
.../Include/Guid/SmramMemoryReserve.h | 43 +
.../Include/Guid/SocketCommonRcVariable.h | 41 +
.../Include/Guid/SocketIioVariable.h | 264 +
.../Include/Guid/SocketMemoryVariable.h | 321 +
.../Include/Guid/SocketMpLinkVariable.h | 173 +
.../Include/Guid/SocketPciResourceData.h | 42 +
.../Guid/SocketPowermanagementVariable.h | 227 +
.../Guid/SocketProcessorCoreVariable.h | 115 +
.../Include/Guid/SocketVariable.h | 35 +
.../Include/Library/CpuPpmLib.h | 707 ++
.../Include/Library/CsrToPcieAddress.h | 42 +
.../Include/Library/MmPciBaseLib.h | 48 +
.../Include/Library/PcieAddress.h | 80 +
.../Include/Library/PciePlatformHookLib.h | 27 +
.../Include/Library/UsraAccessApi.h | 85 +
.../Include/MaxSocket.h | 19 +
.../Include/Ppi/SiliconRegAccess.h | 162 +
.../Include/Protocol/IioUds.h | 44 +
.../Include/Protocol/PciCallback.h | 84 +
.../Include/Protocol/SiliconRegAccess.h | 227 +
.../Include/SocketConfiguration.h | 514 ++
.../Include/UncoreCommonIncludes.h | 354 +
.../Include/UsraAccessType.h | 195 +
.../Chip/Skx/Include/Iio/IioConfig.h | 300 +
.../Chip/Skx/Include/Iio/IioPlatformData.h | 298 +
.../Chip/Skx/Include/Iio/IioRegs.h | 314 +
.../Skx/Include/Iio/IioSetupDefinitions.h | 111 +
.../Chip/Skx/Include/KtiDisc.h | 26 +
.../Chip/Skx/Include/KtiHost.h | 136 +
.../Chip/Skx/Include/KtiSi.h | 39 +
.../Chip/Skx/Include/Protocol/CpuCsrAccess.h | 143 +
.../Chip/Skx/Include/Setup/IioUniversalData.h | 187 +
.../BaseMemoryCoreLib/Core/Include/CpuHost.h | 255 +
.../Core/Include/CsrToPcieAddress.h | 42 +
.../Core/Include/DataTypes.h | 111 +
.../BaseMemoryCoreLib/Core/Include/MemHost.h | 328 +
.../Core/Include/MemHostChipCommon.h | 122 +
.../BaseMemoryCoreLib/Core/Include/MemRegs.h | 13 +
.../Core/Include/MrcCommonTypes.h | 20 +
.../Core/Include/PcieAddress.h | 65 +
.../BaseMemoryCoreLib/Core/Include/Printf.h | 74 +
.../BaseMemoryCoreLib/Core/Include/SysHost.h | 136 +
.../Core/Include/SysHostChipCommon.h | 86 +
.../BaseMemoryCoreLib/Core/Include/SysRegs.h | 68 +
.../Core/Include/UsbDebugPort.h | 318 +
.../Platform/Purley/Include/MemDefaults.h | 17 +
.../Platform/Purley/Include/MemPlatform.h | 81 +
.../Platform/Purley/Include/PlatformHost.h | 176 +
.../Library/CsrToPcieLib/CpuCsrAccessDefine.h | 56 +
.../Library/CsrToPcieLib/CsrToPcieDxeLib.inf | 85 +
.../Library/CsrToPcieLib/CsrToPcieLib.c | 179 +
.../Library/CsrToPcieLib/CsrToPciePeiLib.inf | 81 +
.../CsrToPcieLibNull/BaseCsrToPcieLibNull.inf | 67 +
.../Library/CsrToPcieLibNull/CsrToPcieLib.c | 41 +
.../Library/DxeMmPciBaseLib/DxeMmPciBaseLib.c | 89 +
.../DxeMmPciBaseLib/DxeMmPciBaseLib.inf | 60 +
.../Library/DxeMmPciBaseLib/SmmMmPciBaseLib.c | 86 +
.../DxeMmPciBaseLib/SmmMmPciBaseLib.inf | 60 +
.../Library/MmPciBaseLib/MmPciBaseLib.c | 69 +
.../Library/MmPciBaseLib/MmPciBaseLib.inf | 55 +
.../Library/PcieAddressLib/PcieAddressLib.c | 305 +
.../Library/PcieAddressLib/PcieAddressLib.inf | 70 +
.../Chip/Common/CpuPciAccessCommon.c | 812 ++
.../Chip/Include/CpuCsrAccessDefine.h | 52 +
.../ProcMemInit/Chip/Include/CpuPciAccess.h | 117 +
.../Chip/Include/CpuPciAccessCommon.h | 83 +
.../ProcMemInit/Chip/Include/Rc_Revision.h | 13 +
.../Library/UsraAccessLib/CsrAccess.c | 118 +
.../Library/UsraAccessLib/PcieAccess.c | 354 +
.../Library/UsraAccessLib/UsraAccessLib.c | 235 +
.../Library/UsraAccessLib/UsraAccessLib.h | 257 +
.../Library/UsraAccessLib/UsraAccessLib.inf | 62 +
.../IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec | 609 ++
.../Include/Library/CpuConfigLib.h | 667 ++
.../Include/Protocol/IntelCpuPcdsSetDone.h | 18 +
.../Pch/AcpiTables/Dsdt/GpioDefine.asl | 784 ++
.../Pch/AcpiTables/Dsdt/GpioLib.asl | 1024 +++
.../Pch/AcpiTables/Dsdt/IrqLink.asl | 607 ++
.../Pch/AcpiTables/Dsdt/Pch.asl | 833 ++
.../Pch/AcpiTables/Dsdt/PchAcpiTables.inf | 34 +
.../Pch/AcpiTables/Dsdt/PchHda.asl | 306 +
.../Pch/AcpiTables/Dsdt/PchHeci.asl | 22 +
.../Pch/AcpiTables/Dsdt/PchIsh.asl | 21 +
.../Pch/AcpiTables/Dsdt/PchNvs.asl | 270 +
.../Pch/AcpiTables/Dsdt/PchPcie.asl | 202 +
.../Pch/AcpiTables/Dsdt/PchRstPcieStorage.asl | 216 +
.../Pch/AcpiTables/Dsdt/PchSata.asl | 221 +
.../Pch/AcpiTables/Dsdt/PchScs.asl | 8 +
.../Pch/AcpiTables/Dsdt/PchSerialIo.asl | 7 +
.../Pch/AcpiTables/Dsdt/PchXdci.asl | 8 +
.../Pch/AcpiTables/Dsdt/PchXhci.asl | 557 ++
.../Pch/AcpiTables/Dsdt/RP01_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP02_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP03_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP04_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP05_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP06_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP07_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP08_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP09_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP10_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP11_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP12_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP13_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP14_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP15_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP16_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP17_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP18_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP19_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/RP20_ADR.asl | 14 +
.../Pch/AcpiTables/Dsdt/TraceHubDebug.asl | 142 +
.../Pch/AcpiTables/Dsdt/usbsbd.asl | 63 +
.../Pch/Include/GpioConfig.h | 230 +
.../Pch/Include/GpioPinsSklH.h | 298 +
.../Pch/Include/GpioPinsSklLp.h | 201 +
.../Pch/Include/Library/GpioLib.h | 777 ++
.../Pch/Include/Library/GpioNativeLib.h | 218 +
.../Pch/Include/Library/PchCycleDecodingLib.h | 344 +
.../Pch/Include/Library/PchGbeLib.h | 58 +
.../Pch/Include/Library/PchInfoLib.h | 231 +
.../Pch/Include/Library/PchP2sbLib.h | 154 +
.../Pch/Include/Library/PchPcrLib.h | 190 +
.../Pch/Include/Library/PchPmcLib.h | 56 +
.../Pch/Include/Library/PchPolicyLib.h | 66 +
.../Pch/Include/Library/PchSbiAccessLib.h | 156 +
.../Pch/Include/Library/PchSerialIoLib.h | 212 +
.../Pch/Include/Library/SpiFlashCommonLib.h | 96 +
.../Pch/Include/PchAccess.h | 621 ++
.../Pch/Include/PchLimits.h | 102 +
.../Pch/Include/PchPolicyCommon.h | 2212 +++++
.../Pch/Include/PchReservedResources.h | 81 +
.../Pch/Include/PcieRegs.h | 279 +
.../Pch/Include/Ppi/PchPcieDeviceTable.h | 124 +
.../Pch/Include/Ppi/PchPolicy.h | 19 +
.../Pch/Include/Ppi/PchReset.h | 93 +
.../Pch/Include/Ppi/Spi.h | 25 +
.../Pch/Include/Protocol/PchReset.h | 112 +
.../Pch/Include/Protocol/Spi.h | 306 +
.../Pch/Include/Register/PchRegsDci.h | 24 +
.../Pch/Include/Register/PchRegsDmi.h | 188 +
.../Pch/Include/Register/PchRegsEva.h | 110 +
.../Pch/Include/Register/PchRegsFia.h | 81 +
.../Pch/Include/Register/PchRegsGpio.h | 511 ++
.../Pch/Include/Register/PchRegsHda.h | 226 +
.../Pch/Include/Register/PchRegsHsio.h | 171 +
.../Pch/Include/Register/PchRegsIsh.h | 51 +
.../Pch/Include/Register/PchRegsItss.h | 68 +
.../Pch/Include/Register/PchRegsLan.h | 135 +
.../Pch/Include/Register/PchRegsLpc.h | 430 +
.../Pch/Include/Register/PchRegsP2sb.h | 100 +
.../Pch/Include/Register/PchRegsPcie.h | 513 ++
.../Pch/Include/Register/PchRegsPcr.h | 64 +
.../Pch/Include/Register/PchRegsPmc.h | 627 ++
.../Pch/Include/Register/PchRegsPsf.h | 210 +
.../Pch/Include/Register/PchRegsPsth.h | 46 +
.../Pch/Include/Register/PchRegsSata.h | 634 ++
.../Pch/Include/Register/PchRegsScs.h | 152 +
.../Pch/Include/Register/PchRegsSerialIo.h | 282 +
.../Pch/Include/Register/PchRegsSmbus.h | 134 +
.../Pch/Include/Register/PchRegsSpi.h | 291 +
.../Pch/Include/Register/PchRegsThermal.h | 93 +
.../Pch/Include/Register/PchRegsTraceHub.h | 125 +
.../Pch/Include/Register/PchRegsUsb.h | 463 +
.../Pch/Include/SaRegs.h | 700 ++
.../Library/PchResetCommonLib.h | 59 +
.../Pch/IncludePrivate/PchHHsioAx.h | 16 +
.../Pch/IncludePrivate/PchHHsioBx.h | 16 +
.../Pch/IncludePrivate/PchHHsioDx.h | 16 +
.../Pch/IncludePrivate/PchHsio.h | 147 +
.../Pch/IncludePrivate/PchLbgHsioAx.h | 16 +
.../Pch/IncludePrivate/PchLbgHsioBx.h | 17 +
.../Pch/IncludePrivate/PchLbgHsioBxD.h | 19 +
.../Pch/IncludePrivate/PchLbgHsioBxD_Ext.h | 19 +
.../Pch/IncludePrivate/PchLbgHsioBx_Ext.h | 17 +
.../Pch/IncludePrivate/PchLbgHsioSx.h | 17 +
.../Pch/IncludePrivate/PchLbgHsioSx_Ext.h | 17 +
.../Pch/IncludePrivate/PchLpHsioBx.h | 16 +
.../Pch/IncludePrivate/PchLpHsioCx.h | 16 +
.../Pch/IncludePrivate/PchPolicyHob.h | 18 +
.../DxeRuntimeResetSystemLib.inf | 63 +
.../DxeRuntimeResetSystemLib/PchReset.c | 633 ++
.../DxeRuntimeResetSystemLib/PchReset.h | 105 +
.../Pch/Library/PeiDxeSmmGpioLib/GpioInit.c | 403 +
.../Pch/Library/PeiDxeSmmGpioLib/GpioLib.c | 2738 ++++++
.../Library/PeiDxeSmmGpioLib/GpioLibrary.h | 216 +
.../Library/PeiDxeSmmGpioLib/GpioNativeLib.c | 448 +
.../Library/PeiDxeSmmGpioLib/PchSklGpioData.c | 59 +
.../PeiDxeSmmGpioLib/PeiDxeSmmGpioLib.inf | 48 +
.../PchCycleDecodingLib.c | 1169 +++
.../PeiDxeSmmPchCycleDecodingLib.inf | 33 +
.../Library/PeiDxeSmmPchGbeLib/PchGbeLib.c | 160 +
.../PeiDxeSmmPchGbeLib/PeiDxeSmmPchGbeLib.inf | 37 +
.../Library/PeiDxeSmmPchInfoLib/PchInfoLib.c | 505 ++
.../PeiDxeSmmPchInfoLib/PchInfoStrLib.c | 291 +
.../PeiDxeSmmPchInfoLib.inf | 32 +
.../Library/PeiDxeSmmPchP2sbLib/PchP2sbLib.c | 331 +
.../PeiDxeSmmPchP2sbLib.inf | 30 +
.../Library/PeiDxeSmmPchPcrLib/PchPcrLib.c | 453 +
.../PeiDxeSmmPchPcrLib/PeiDxeSmmPchPcrLib.inf | 31 +
.../Library/PeiDxeSmmPchPmcLib/PchPmcLib.c | 153 +
.../PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf | 31 +
.../PchSbiAccessLib.c | 370 +
.../PeiDxeSmmPchSbiAccessLib.inf | 31 +
.../Library/PeiPchPolicyLib/PchPrintPolicy.c | 730 ++
.../Library/PeiPchPolicyLib/PeiPchPolicyLib.c | 581 ++
.../PeiPchPolicyLib/PeiPchPolicyLib.inf | 48 +
.../PeiPchPolicyLib/PeiPchPolicyLibrary.h | 25 +
.../Library/PeiPchPolicyLib/Rvp3PolicyLib.c | 205 +
.../SmmSpiFlashCommonLib.inf | 50 +
.../SmmSpiFlashCommonLib/SpiFlashCommon.c | 192 +
.../SpiFlashCommonSmmLib.c | 53 +
.../BasePchResetCommonLib.inf | 27 +
.../BasePchResetCommonLib/PchResetCommon.c | 168 +
.../Intel/PurleyRefreshSiliconPkg/SiPkg.dec | 390 +
.../SiPkgCommonLib.dsc | 33 +
.../PurleyRefreshSiliconPkg/SiPkgDxeLib.dsc | 22 +
.../PurleyRefreshSiliconPkg/SiPkgPeiLib.dsc | 12 +
401 files changed, 91922 insertions(+)
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/AmlOffsetTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/AMLUPD.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/CommonPlatform.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/DSDT.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/HostBus.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/IioPcieHotPlugGpeHandler.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/IioPcieRootPortHotPlug.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Itss.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Mother.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Os.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC00.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC01.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC02.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC03.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC04.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC05.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC06.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC06Ejd.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC07.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC08.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC09.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC10.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC11.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC12.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC12Ejd.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC13.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC14.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC15.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC16.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC17.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC18.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC18Ejd.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC19.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC20.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC21.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC22.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC23.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC24.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC25.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC26.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC27.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC28.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC29.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC30.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC31.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC32.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC33.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC34.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC35.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC36.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC37.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC38.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC39.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC40.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC41.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC42.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC43.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC44.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC45.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC46.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PC47.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Pch.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchApic.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchEhci1.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchEhci2.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchGbe.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchLpc.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchSata.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchXhci.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PciCrs.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PciIrq.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PcieHp.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PcieHpDev.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PcieNonHpDev.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PcieSeg.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Platform.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PlatformGpe.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PlatformPciTree_WFP.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Sck1Ejd.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Sck2Ejd.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Sck3Ejd.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Uncore0.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Uncore1.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Uncore2.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Uncore3.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/WFPPlatform.asl
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/GitEdk2MinMtOlympus.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BasePlatformHookLib/BasePlatformHookLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BasePlatformHookLib/BasePlatformHookLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeMtOlympusAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmMtOlympusAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/AllLanesEparam.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/GpioTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/IioBifur.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiBoardInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiBoardInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiMtOlympusDetect.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiMtOlympusInitLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiMtOlympusInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiMtOlympusInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/UsbOC.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgBuildOption.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgPcd.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/StructureConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/bld.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_board.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_config.cfg
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/logo.txt
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/postbuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/prebuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/IpmiLibKcs.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/KcsBmc.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/KcsBmc.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiPlatformHookLib/IpmiPlatformHookLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiPlatformHookLib/IpmiPlatformHookLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/Acpi/GlobalNvs.asi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/Acpi/GlobalNvsAreaDef.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/Guid/PchRcVariable.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/Guid/SetupVariable.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/IioBifurcationSlotTable.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/Platform.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/Ppi/SystemBoard.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/Protocol/PciIovPlatform.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/SetupTable.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Include/SioRegs.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/MemoryTest.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/PlatformBootOption.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/IoApic.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciIovPlatformPolicy.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciIovPlatformPolicy.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciPlatform.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciPlatform.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciPlatform.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciPlatformHooks.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciPlatformHooks.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciSupportLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Pci/PciPlatform/PciSupportLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/IioUdsDataDxe/IioUdsDataDxe.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/IioUdsDataDxe/IioUdsDataDxe.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/IioUdsDataDxe/IioUdsDataDxe.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyInitLib/SiliconPolicyInitLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyInitLib/SiliconPolicyInitLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyUpdateLib/PchPolicyUpdateUsb.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/PlatformCpuPolicy/PlatformCpuPolicy.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/PlatformCpuPolicy/PlatformCpuPolicy.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/S3NvramSave/S3NvramSave.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/S3NvramSave/S3NvramSave.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/S3NvramSave/S3NvramSave.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/SystemBoard/SystemBoardCommon.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/SystemBoard/SystemBoardPei.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/SystemBoard/SystemBoardPei.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Policy/SystemBoard/SystemBoardPei.inf
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Iio/Include/Protocol/IioSystem.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/MemoryConfigData.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/MemoryMapData.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/PartialMirrorGuid.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SmramMemoryReserve.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SocketCommonRcVariable.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SocketIioVariable.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SocketMemoryVariable.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SocketMpLinkVariable.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SocketPciResourceData.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SocketPowermanagementVariable.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SocketProcessorCoreVariable.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Guid/SocketVariable.h
create mode 100644 Silicon/Intel/PurleyRefreshSiliconPkg/Include/Library/CpuPpmLib.h
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--
2.27.0.windows.1
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2021-05-15 1:30 ` [edk2-devel] [edk2-platforms] [PATCH V1 00/18] Reinstate Purley MinPlatform Nate DeSimone
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