From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.2914.1587546969826819619 for ; Wed, 22 Apr 2020 02:16:09 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@intel.onmicrosoft.com header.s=selector2-intel-onmicrosoft-com header.b=o1perPDX; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: liming.gao@intel.com) IronPort-SDR: uVnXZzZ/UV+2B5T/WykXwsp3wgUYQ+a7RAEsH8ZtkBCZnfkNhuGn2XSM1kMADUZy794GdFLNo0 i9uLrJPEeN3g== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2020 02:16:08 -0700 IronPort-SDR: D147XCXpRDutRB0R+9P96L9Io04KnZ5+CeqUHHHfplov61GGTgFGjentOaBgJn5/eRI7/KfmVI 2MH8qUAG09kQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,413,1580803200"; d="scan'208";a="429843242" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga005.jf.intel.com with ESMTP; 22 Apr 2020 02:16:08 -0700 Received: from fmsmsx163.amr.corp.intel.com (10.18.125.72) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 22 Apr 2020 02:16:07 -0700 Received: from FMSEDG002.ED.cps.intel.com (10.1.192.134) by fmsmsx163.amr.corp.intel.com (10.18.125.72) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 22 Apr 2020 02:16:07 -0700 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (104.47.58.102) by edgegateway.intel.com (192.55.55.69) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 22 Apr 2020 02:15:44 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=fF8QU2aWmt18nhbF5sqxjx59J9CF2ZKlstjuHLo6Ii7KyonSLskkgZr/P2dyJneC0GLkVC2ZB8m0BHdg2yhxuLivz8DKw0zWrToswDSEWn+qlAv/d+LnPXwVqzSjCfLYGTv1QhRhgkoQ6DA41d8Z4pCRXa1DBPxfyi9iwVmdzVCM2ZG/ex9JJZquWneoKjBd+SMJljuC2gFOGj9YWAqLv+MhjlAE8aHYDyJpv79PYbY13Hx38pMP7vyyCjrs3PWEIgHlGRIEk2RLKfegtupLlcDo1Dc2W3y0594ytDqFR+CO1sIVvmZ/06CLeiNhhPTxBGpxRsMNvSOfVmyLEwtOUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=PiwqIFtO4rzTDRAwBWiWW/WcolPAEzgfnJSnxSayAfo=; b=BfGVYKdSZrHyw8wzm/Oj+gC+J/cU17vWX7unELaO3cq3aBLy+lpmQ9hDInprOOGMGpBqR9WqF9RrNHzBc99AbUXjhwD1pfdzRWNimjjv/fbDu7KajP47LTCaWPssgI44UsJOr+dYj6YS5Ho6Q4EfhMWUOM6h1LqaNbW2K/a3nvCZVro2uHl4CaR1BTHCQzZp3kLCLt0vXu59UTNx8S92cyD7pheWM676odsxPOxZ3dA703zMFMiyKetpdevLx6j/2V08XsXJBbUrYLW5oeJlqtiKzD5uwlC23uUxZy4Bt/ZEjsElNkAC5ouUN0gLh+NaY1wISx4Jmv+2joAQUBdwBg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=PiwqIFtO4rzTDRAwBWiWW/WcolPAEzgfnJSnxSayAfo=; b=o1perPDX7zgVOS4EylmFExACgn8EYZ5bKzOk2vuBx3I7uMwxRg93WoQm+kPb9H4kBPfD0NVTpSpj/cao+wbt/riRTT9QbuRgwhU7hTni/TdDJs57xf/krM5rmqSxSdQJ3jpEXc0hhQyCydS6ORC32hJLgF3y+svnG77nviwzofI= Received: from BN6PR11MB3972.namprd11.prod.outlook.com (2603:10b6:405:7f::11) by BN6PR11MB1649.namprd11.prod.outlook.com (2603:10b6:405:f::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2921.27; Wed, 22 Apr 2020 09:15:33 +0000 Received: from BN6PR11MB3972.namprd11.prod.outlook.com ([fe80::4dcc:bc5c:def:9ae9]) by BN6PR11MB3972.namprd11.prod.outlook.com ([fe80::4dcc:bc5c:def:9ae9%5]) with mapi id 15.20.2921.030; Wed, 22 Apr 2020 09:15:33 +0000 From: "Liming Gao" To: "devel@edk2.groups.io" , "Chang, Abner (HPS SW/FW Technologist)" CC: "Chen, Gilbert" , Leif Lindholm , "Kinney, Michael D" Subject: Re: [edk2-devel] [PATCH v2 8/9] MdePkg/BaseSynchronizationLib: RISC-V cache related code. Thread-Topic: [edk2-devel] [PATCH v2 8/9] MdePkg/BaseSynchronizationLib: RISC-V cache related code. Thread-Index: AQHWF7dH/XIsV7yJ/ki82ykDQPrBYKiE3aKA Date: Wed, 22 Apr 2020 09:15:33 +0000 Message-ID: References: <1607C88B87B941AC.8676@groups.io> In-Reply-To: <1607C88B87B941AC.8676@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.2.0.6 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: spf=none (sender IP is ) smtp.mailfrom=liming.gao@intel.com; x-originating-ip: [192.55.52.209] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0a1b0df9-a297-4850-c122-08d7e69db63a x-ms-traffictypediagnostic: BN6PR11MB1649: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:199; x-forefront-prvs: 03818C953D x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BN6PR11MB3972.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(10019020)(366004)(39860400002)(136003)(346002)(376002)(396003)(4326008)(54906003)(19627235002)(81156014)(66476007)(107886003)(7696005)(316002)(9686003)(2906002)(110136005)(26005)(52536014)(966005)(55016002)(76116006)(6506007)(66946007)(66556008)(8676002)(64756008)(478600001)(71200400001)(53546011)(5660300002)(33656002)(66446008)(186003)(8936002)(86362001);DIR:OUT;SFP:1102; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: Jh2CV9hYqqzLDU0CjuE04/Of50XBkYcq/N2iVo3VsRwCptOKcI1caTnHJz0kz/+qcNIevIjLBx1a51c63fX2m1G8zmjesQDeqLYGWHrZ/VabwHUFJDrjVu2Dp4h8d90ExFothzNySWkuLD8IYvoMrxniscy8Qeub1ShVrf770tijl9vO2YJvKkM1Lo1G2Fx1u36Z/xEe5QBU81pu87+BH68cnPCspLTmos+LBXlUffPKKgLBsAq+sMZGUMpJwzpAyHbu9cZhLXmlwQm2OXLl3W2VKk8xY49xW/bK7/FarHu/wwtz5TJuPnk2PVMzmhS0Ky+pHUcT00HaE8p6+mgoe/ntKMKoRVJIF9JkQVNXdscVnuAQV4I7VdQNByfdgKkyHABODlhLPpodM+nA3gGIBN0gO0Ze/JPWahHHKA6dNDp8m6VF49KR9uNWO+8ZISJj0pe4TbVaqBdOF3gLAJfZS0lnJq923F/vYHNHEoFyva1Tfz7V1PzBJtCNYYRJpCasDOZLwE2MLBvXHkmokIewaQ== x-ms-exchange-antispam-messagedata: N5NWlZltJfyL3B5rBMFesSKxrWy2z8c0RRr+vGGaJdHPaawCGuikMnfd7THSeJXwAGNmP77cGTQmCPNhxuOZUhvzMGWS/JXYJpOB6inaMVDHlBfCreLpmXxbwmE7wJoNbgnSE/jVYj8qnpEYvV6u5Q== MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 0a1b0df9-a297-4850-c122-08d7e69db63a X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Apr 2020 09:15:33.6543 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 5ET+kfjbdSxNTCVOU38dqYGPodMtRjlJLKIvjyCl2pKuTMRNqdvvK8UVo+h6SoYY35DVfmfGRZSEHqV3MD8tHw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1649 Return-Path: liming.gao@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Liming Gao > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Chang, Ab= ner (HPS SW/FW Technologist) > Sent: Tuesday, April 21, 2020 3:53 PM > To: devel@edk2.groups.io > Cc: Chang, Abner (HPS SW/FW Technologist) ; Chen, G= ilbert ; Leif Lindholm > ; Kinney, Michael D ; Gao, Liming > Subject: [edk2-devel] [PATCH v2 8/9] MdePkg/BaseSynchronizationLib: RISC= -V cache related code. >=20 > Support RISC-V cache related functions. >=20 > Signed-off-by: Abner Chang > Co-authored-by: Gilbert Chen > Reviewed-by: Leif Lindholm >=20 > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Leif Lindholm > Cc: Gilbert Chen > --- > .../BaseSynchronizationLib.inf | 5 ++ > .../RiscV64/Synchronization.S | 78 +++++++++++++++++++ > 2 files changed, 83 insertions(+) > create mode 100644 MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchr= onization.S >=20 > diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLi= b.inf > b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > index 446bc19b63..83d5b8ed7c 100755 > --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > @@ -3,6 +3,7 @@ > # > # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<= BR> > +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All r= ights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -78,6 +79,10 @@ > AArch64/Synchronization.S | GCC > AArch64/Synchronization.asm | MSFT >=20 > +[Sources.RISCV64] > + Synchronization.c > + RiscV64/Synchronization.S > + > [Packages] > MdePkg/MdePkg.dec >=20 > diff --git a/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronizati= on.S > b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S > new file mode 100644 > index 0000000000..bac80d6871 > --- /dev/null > +++ b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S > @@ -0,0 +1,78 @@ > +//---------------------------------------------------------------------= --------- > +// > +// RISC-V synchronization functions. > +// > +// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All r= ights reserved.
> +// > +// SPDX-License-Identifier: BSD-2-Clause-Patent > +// > +//---------------------------------------------------------------------= --------- > +#include > + > +.data > + > +.text > +.align 3 > + > +.global ASM_PFX(InternalSyncCompareExchange32) > +.global ASM_PFX(InternalSyncCompareExchange64) > +.global ASM_PFX(InternalSyncIncrement) > +.global ASM_PFX(InternalSyncDecrement) > + > +// > +// ompare and xchange a 32-bit value. > +// > +// @param a0 : Pointer to 32-bit value. > +// @param a1 : Compare value. > +// @param a2 : Exchange value. > +// > +ASM_PFX (InternalSyncCompareExchange32): > + lr.w a3, (a0) // Load the value from a0 and make > + // the reservation of address. > + bne a3, a1, exit > + sc.w a3, a2, (a0) // Write the value back to the address. > + mv a3, a1 > +exit: > + mv a0, a3 > + ret > + > +.global ASM_PFX(InternalSyncCompareExchange64) > + > +// > +// Compare and xchange a 64-bit value. > +// > +// @param a0 : Pointer to 64-bit value. > +// @param a1 : Compare value. > +// @param a2 : Exchange value. > +// > +ASM_PFX (SyncCompareExchange64): > + lr.d a3, (a0) // Load the value from a0 and make > + // the reservation of address. > + bne a3, a1, exit > + sc.d a3, a2, (a0) // Write the value back to the address. > + mv a3, a1 > +exit2: > + mv a0, a3 > + ret > + > +// > +// Performs an atomic increment of an 32-bit unsigned integer. > +// > +// @param a0 : Pointer to 32-bit value. > +// > +ASM_PFX (InternalSyncIncrement): > + li a1, 1 > + amoadd.w a2, a1, (a0) > + mv a0, a2 > + ret > + > +// > +// Performs an atomic decrement of an 32-bit unsigned integer. > +// > +// @param a0 : Pointer to 32-bit value. > +// > +ASM_PFX (InternalSyncDecrement): > + li a1, -1 > + amoadd.w a2, a1, (a0) > + mv a0, a2 > + ret > -- > 2.25.0 >=20 >=20 >=20