Re: [edk2-devel] [PATCH v1 7/9] MdePkg/BaseCpuLib: RISC-V Base CPU library implementation.

["Zhiguang Liu" <zhiguang.liu@intel.com>]

Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner Chang
Sent: Friday, April 10, 2020 3:21 PM
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com; Gilbert Chen <gilbert.chen@hpe.com>; Leif Lindholm <leif.lindholm@linaro.org>; Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming <liming.gao@intel.com>
Subject: [edk2-devel] [PATCH v1 7/9] MdePkg/BaseCpuLib: RISC-V Base CPU library implementation.

Implement RISC-V CPU related functions in BaseCpuLib.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
---
 MdePkg/Library/BaseCpuLib/BaseCpuLib.inf |  6 +++++-  MdePkg/Library/BaseCpuLib/BaseCpuLib.uni |  5 +++--
 MdePkg/Library/BaseCpuLib/RiscV/Cpu.S    | 19 +++++++++++++++++++
 3 files changed, 27 insertions(+), 3 deletions(-)  create mode 100644 MdePkg/Library/BaseCpuLib/RiscV/Cpu.S

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index a7cb381a85..950f5229b2 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -7,6 +7,7 @@
 #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR> #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> #  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR> # #  SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -24,7 +25,7 @@
   #-#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64+#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64 #  [Sources.IA32]@@ -59,6 +60,9 @@
   AArch64/CpuFlushTlb.asm | MSFT   AArch64/CpuSleep.asm    | MSFT +[Sources.RISCV64]+  RiscV/Cpu.S+ [Packages]   MdePkg/MdePkg.dec diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
index fc95cda9fc..80dc495786 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
@@ -1,12 +1,13 @@
 // /** @file // Instance of CPU Library for various architecture. //-// CPU Library implemented using ASM functions for IA-32 and X64,+// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, // PAL CALLs for IPF, and empty functions for EBC. // // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR> // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>+// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR> // // SPDX-License-Identifier: BSD-2-Clause-Patent //@@ -15,5 +16,5 @@
  #string STR_MODULE_ABSTRACT             #language en-US "Instance of CPU Library for various architectures" -#string STR_MODULE_DESCRIPTION          #language en-US "CPU Library implemented using ASM functions for IA-32 and X64, PAL CALLs for IPF, and empty functions for EBC."+#string STR_MODULE_DESCRIPTION          #language en-US "CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, and empty functions for EBC." diff --git a/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S
new file mode 100644
index 0000000000..375b91d314
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S
@@ -0,0 +1,19 @@
+//------------------------------------------------------------------------------+//+// CpuSleep for RISC-V+//+// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>+// SPDX-License-Identifier: BSD-2-Clause-Patent+//+//------------------------------------------------------------------------------+.data+.align 3+.section .text++.global ASM_PFX(_CpuSleep)++ASM_PFX(_CpuSleep):+    wfi+    ret++-- 
2.25.0


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