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Thread-Topic: [edk2-devel] [PATCH v4 3/3] BaseTools: BaseTools changes for RISC-V platform. Thread-Index: AQHWF7XWs9WbmjtHtkW/Ge7bqQ2n+KiDQeDA Date: Tue, 21 Apr 2020 08:51:45 +0000 Message-ID: References: <20200421074213.25795-1-abner.chang@hpe.com> In-Reply-To: <20200421074213.25795-1-abner.chang@hpe.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.2.0.6 dlp-product: dlpe-windows authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiguang.liu@intel.com; x-originating-ip: [192.102.204.36] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 6e862ee2-e515-4c94-db40-08d7e5d1389f x-ms-traffictypediagnostic: BN7PR11MB2627: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8273; x-forefront-prvs: 038002787A x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BN7PR11MB2804.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(10019020)(376002)(39860400002)(346002)(396003)(366004)(136003)(26005)(81156014)(52536014)(55016002)(316002)(9686003)(66446008)(8936002)(107886003)(66556008)(2906002)(66476007)(64756008)(66946007)(76116006)(86362001)(33656002)(53546011)(478600001)(5660300002)(45080400002)(4326008)(6506007)(8676002)(966005)(7696005)(186003)(110136005)(54906003)(71200400001);DIR:OUT;SFP:1102; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 8tCfGiTGPs1iaiv+lgOfVS2oVYd01AepyU3CbSaKcMlVMZ3OY+L6Fx4Q4Ddnnn6mQDhqJXIiVxCxvnDSwMU6SlkUN9YEuVgV6ryBbX6KftALNkosZWp03eXnKzF/D4wRK4KwcyUwFf+SBo0Pn7OniQh8Q1a7QfHwBoEt2uHWCDPdjmOYpAVIVyrVfIsegkTOidkpDJiKVGfSfUFfxb0sVbVjW+GqTsQWid3+ctyddwmQyYwhUcUaAC4/DjbGtz42SBQlrRhuV8g5aGTEYoaozuKiAcomkHwIbRONVObI/mlvcvcb2Q4XeVU1gs7xCW0D+SWyv9N9PdSMUO08nfzN8Pe8zduuDkNPEEaXS07NY6yaM+kfh9T5OwyWl+pLQSHXTSlkpij8dFWPT1UZnBHXOjm0CmT75oAmt7RFghz7pk56K8M+BiFdDg4elJzb8EzpCY6wIQGncb8q/QnK0KVwe2ABQM5jR0sNMaC7qGkehsnjg4vQp47tUQwuYASgMIrWmWXfnhr3AuPHsWD9YCGeNg== x-ms-exchange-antispam-messagedata: X+kFha+L+mXqbzeMBX+DgNASZr532lxzxkj9cQw7NkRa8Fa6BtAS6xH/Xgn4dgPjB64ySvVqgKYlMXZms6pWkjer7ZnTuG4PqB+4o3+MrrYuPcuTLe+sgU++yfD9UirhLpoC7iUVge4emBAXbWldYQ== MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 6e862ee2-e515-4c94-db40-08d7e5d1389f X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Apr 2020 08:51:45.5061 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 9u8I4N7AAQLuiNfHwVyvq5qe4rEXhfeXnU/RmDcMI8RBp5NokYN/8G75uihrFuPsFJcRFHWUZRtsMmPxvcNVbw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR11MB2627 Return-Path: zhiguang.liu@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Abner Thanks very much for the contribution. According to the process, if you want to update your patch, please re-send = all the patch in the same patch set with the version updated. If some patch already get reviewed-by, you can update the commit message. Thanks Zhiguang The code change is good for me. Reviewed-by: Zhiguang Liu -----Original Message----- From: devel@edk2.groups.io On Behalf Of Abner Chang Sent: Tuesday, April 21, 2020 3:42 PM To: devel@edk2.groups.io Cc: abner.chang@hpe.com; Gilbert Chen ; Daniel Helmut= Schaefer ; Leif Lindholm ; Feng, Bob C ; Gao, Liming Subject: [edk2-devel] [PATCH v4 3/3] BaseTools: BaseTools changes for RISC-= V platform. Tools definitions template file changes for building EDK2 RISC-V platform. Signed-off-by: Abner Chang Co-authored-by: Gilbert Chen Co-authored-by: Daniel Helmut Schaefer Reviewed-by: Leif Lindholm Cc: Bob Feng Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- BaseTools/Conf/tools_def.template | 53 +++++++++++++++++++++++++++++-- 1 file changed, 51 insertions(+), 2 deletions(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.t= emplate index 88d7ab8cab..c7e19f4544 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -3,7 +3,7 @@ # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
# Copyright (c) 2015, Hewlett-Packard Development Company, L.P.
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
+# (C) Copyright 2020, Hewlett Packard Enterprise Development LP
# Copyright (c) Microsoft Corporation # # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -267,11 +267,12 @@ DEFINE DTC_BIN =3D ENV(DTC_PREFIX)dtc # Intel(r) ACPI Compiler from # https://acpica.org/downloads # GCC5 -Linux,Windows- Requires: -# GCC 5 with LTO support, targeting x86_64-lin= ux-gnu, aarch64-linux-gnu, or arm-linux-gnueabi +# GCC 5 with LTO support, targeting x86_64-lin= ux-gnu, aarch64-linux-gnu, arm-linux-gnueabi or riscv64-linux-gnu # Optional: # Required to build platforms or ACPI tables: # Intel(r) ACPI Compiler from # https://acpica.org/downloads +# # CLANG35 -Linux,Windows- Requires: # Clang v3.5 or later, and GNU binutils target= ing aarch64-linux-gnu or arm-linux-gnueabi # Optional: @@ -1946,6 +1947,7 @@ DEFINE GCC_IA32_RC_FLAGS =3D -I binary -O e= lf32-i386 -B i386 DEFINE GCC_X64_RC_FLAGS =3D -I binary -O elf64-x86-64 -B= i386 --rename-section .data=3D.hii DEFINE GCC_ARM_RC_FLAGS =3D -I binary -O elf32-littlearm -B= arm --rename-section .data=3D.hii DEFINE GCC_AARCH64_RC_FLAGS =3D -I binary -O elf64-littleaarch64 -B= aarch64 --rename-section .data=3D.hii +DEFINE GCC_RISCV64_RC_FLAGS =3D -I binary -O elf64-littleriscv -B= riscv --rename-section .data=3D.hii =20 # GCC Build Flag for included header file list generation DEFINE GCC_DEPS_FLAGS =3D -MMD -MF $@.deps @@ -2020,6 +2022,22 @@ DEFINE GCC5_ARM_ASLDLINK_FLAGS =3D DEF(GCC49_A= RM_ASLDLINK_FLAGS) DEFINE GCC5_AARCH64_ASLDLINK_FLAGS =3D DEF(GCC49_AARCH64_ASLDLINK_FLAGS) DEFINE GCC5_ASLCC_FLAGS =3D DEF(GCC49_ASLCC_FLAGS) -fno-lto =20 +DEFINE GCC5_RISCV_ALL_CC_FLAGS =3D -g -fshort-wchar -fn= o-strict-aliasing -Wall -Werror -Wno-array-bounds -ffunction-sections -fdat= a-sections -include AutoGen.h -fno-common -DSTRING_ARRAY_NAME=3D$(BASE_NAME= )Strings -msmall-data-limit=3D0 +DEFINE GCC5_RISCV_ALL_DLINK_COMMON =3D -nostdlib -Wl,-n,-q,= --gc-sections -z common-page-size=3D0x40 +DEFINE GCC5_RISCV_ALL_DLINK_FLAGS =3D DEF(GCC5_RISCV_ALL_D= LINK_COMMON) -Wl,--entry,$(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Wl,-= Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map +DEFINE GCC5_RISCV_ALL_DLINK2_FLAGS =3D -Wl,--defsym=3DPECOF= F_HEADER_SIZE=3D0x220,--script=3D$(EDK_TOOLS_PATH)/Scripts/GccBase.lds +DEFINE GCC5_RISCV_ALL_ASM_FLAGS =3D -c -x assembler -ima= cros $(DEST_DIR_DEBUG)/AutoGen.h +DEFINE GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE =3D -Wno-tautological-co= mpare -Wno-pointer-compare + +DEFINE GCC5_RISCV_OPENSBI_TYPES =3D -DOPENSBI_EXTERNAL_S= BI_TYPES=3DOpensbiTypes.h + +DEFINE GCC5_RISCV64_ARCH =3D rv64imafdc +DEFINE GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS =3D DEF(GCC5_RISCV_ALL_DLINK_CO= MMON) -Wl,--entry,ReferenceAcpiTable -u ReferenceAcpiTable +DEFINE GCC5_RISCV64_CC_FLAGS =3D DEF(GCC5_RISCV_ALL_CC_FLAGS= ) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) DEF(GCC5_RISCV_OPENSBI_TYPES= ) -march=3DDEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-sta= ck-protector -Wno-address -fno-asynchronous-unwind-tables -Wno-unused-but-s= et-variable -fpack-struct=3D8 -mcmodel=3Dmedany -mabi=3Dlp64 -mno-relax +DEFINE GCC5_RISCV64_DLINK_FLAGS =3D DEF(GCC5_RISCV_ALL_DLINK_FL= AGS) -Wl,-melf64lriscv,--oformat=3Delf64-littleriscv,--no-relax +DEFINE GCC5_RISCV64_DLINK2_FLAGS =3D DEF(GCC5_RISCV_ALL_DLINK2_F= LAGS) +DEFINE GCC5_RISCV64_ASM_FLAGS =3D DEF(GCC5_RISCV_ALL_ASM_FLAG= S) -march=3DDEF(GCC5_RISCV64_ARCH) -mcmodel=3Dmedany -mabi=3Dlp64 + ##########################################################################= ########## # # GCC 4.8 - This configuration is used to compile under Linux to produce @@ -2464,6 +2482,37 @@ RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS =3D -z common-pa= ge-size=3D0x20 NOOPT_GCC5_AARCH64_DLINK_FLAGS =3D DEF(GCC5_AARCH64_DLINK_FLAGS) -O0 NOOPT_GCC5_AARCH64_DLINK_XIPFLAGS =3D -z common-page-size=3D0x20 -O0 =20 +##########################################################################= ########## +# +# GCC RISC-V This configuration is used to compile under Linux to produce +# PE/COFF binaries using GCC RISC-V tool chain +# +##########################################################################= ########## + +################## +# GCC5 RISCV64 definitions +################## +*_GCC5_RISCV64_OBJCOPY_PATH =3D ENV(GCC5_RISCV64_PREFIX)objcopy +*_GCC5_RISCV64_CC_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc +*_GCC5_RISCV64_SLINK_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc-ar +*_GCC5_RISCV64_DLINK_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc +*_GCC5_RISCV64_ASLDLINK_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc +*_GCC5_RISCV64_ASM_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc +*_GCC5_RISCV64_PP_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc +*_GCC5_RISCV64_VFRPP_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc +*_GCC5_RISCV64_ASLCC_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc +*_GCC5_RISCV64_ASLPP_PATH =3D ENV(GCC5_RISCV64_PREFIX)gcc +*_GCC5_RISCV64_RC_PATH =3D ENV(GCC5_RISCV64_PREFIX)objcopy + +*_GCC5_RISCV64_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) +*_GCC5_RISCV64_ASLDLINK_FLAGS =3D DEF(GCC5_RISCV32_RISCV64_ASLDLINK_= FLAGS) +*_GCC5_RISCV64_ASM_FLAGS =3D DEF(GCC5_RISCV64_ASM_FLAGS) +*_GCC5_RISCV64_CC_FLAGS =3D DEF(GCC5_RISCV64_CC_FLAGS) -save-t= emps +*_GCC5_RISCV64_DLINK_FLAGS =3D DEF(GCC5_RISCV64_DLINK_FLAGS) +*_GCC5_RISCV64_DLINK2_FLAGS =3D DEF(GCC5_RISCV64_DLINK2_FLAGS) +*_GCC5_RISCV64_RC_FLAGS =3D DEF(GCC_RISCV64_RC_FLAGS) +*_GCC5_RISCV64_OBJCOPY_FLAGS =3D + ##########################################################################= ########## # # CLANG35 - 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