From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web11.5147.1587459191057024011 for ; Tue, 21 Apr 2020 01:53:11 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@intel.onmicrosoft.com header.s=selector2-intel-onmicrosoft-com header.b=bg90AQvI; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: zhiguang.liu@intel.com) IronPort-SDR: EfnmrgDF0jtTfj68qOazJrQj0dr7mv/gKGUs49JjiU573J0dXRFEoJuCDphys67N4RE8vBFCwk ptiOSX3q/G4Q== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2020 01:53:10 -0700 IronPort-SDR: q01vkxybsjr7loDgPUmsiLIhBs4FetRssl8MJBgWvmeH9bgJ9StxoZAqOfelLb74YzNNYbT9YF kYoQrR9S9kqQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,409,1580803200"; d="scan'208";a="247122230" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga008.fm.intel.com with ESMTP; 21 Apr 2020 01:53:10 -0700 Received: from fmsmsx102.amr.corp.intel.com (10.18.124.200) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 21 Apr 2020 01:53:10 -0700 Received: from FMSEDG001.ED.cps.intel.com (10.1.192.133) by FMSMSX102.amr.corp.intel.com (10.18.124.200) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 21 Apr 2020 01:53:10 -0700 Received: from NAM02-SN1-obe.outbound.protection.outlook.com (104.47.36.52) by edgegateway.intel.com (192.55.55.68) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 21 Apr 2020 01:53:10 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=OG0yW3FKuqRIbVO6TvNdPgfl7gfRXQz/GXreXKk8kVpHGlhBif5lCLMx4M1EnEJSpPXdwyl7M/+EacTRhvVTJpoONOs0yFZ6YQ9hBUll5G/WcWIjR/1+9QFK4gznqb3AWkdD/Ux0jKck6L3wAv7dD+bZw99F4kabn5leFmffc0f42xGUuasavzR1b0Pcu8UxQnX4XI+eG5N/Qy2YVQinpg3O3R/GZjSRunQKBqJkd0vFk6kq4yR3mWZTVgzZp5WlVbkqrI5PtR45JfzrpFO0sAjYUbtW8hrs63B33pF6LYM3ipB78t7RYKoE2oW/mL/DeRiz1w0yX+TUlgvl2X4frw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=YqBRgmUwkLXNkVfs0tiNdMbP1beI99OgA2vK4wUmSrQ=; b=nsdbok6whTkOWAYFHPQkIGoBkWGjSiMsvDC5R+xfXxBi/dZSSG6ZISvohp2ylJgks4l8PTRI4cIEqG/H/IxalNkJ4z1fXCEdIIQZAFlLf56xUl7bo0SK8bIvQPJX7kvJnSuVRxWFG0EZr6/NS7tDgbPb/YM8F4kC8JwxEr3HoovCQuRkth/yVYANl+tpC7kDIXwwu6+oPq+OeXS/Izk4PInXzST8d8Fw5ofT+pslE+FnfEX5L80KHnKAkcjqc39F8Mekvi9o649IMDoPLcMK97zQ2ldhGuQkyIFnD3L7iROeRFgkjmwojmUMD8hSihUd1HQGVNAiNeIcGSXgLuKBBA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=YqBRgmUwkLXNkVfs0tiNdMbP1beI99OgA2vK4wUmSrQ=; b=bg90AQvIzHbtZUa5HV381fr9pV6lWQNmNQ8Pigb67JiNaZqirw9DPqH7iBu9V7OI1PIsbyI/X3M1vSPh9kjiEJLrk3oqAjYew4zXBxwfT/2x8J1iEQNX8f9497NAoaAgMRZcayeCdVzw3fU4OVeg6e+iLgmtqYsSC/of4bwSN94= Received: from BN7PR11MB2804.namprd11.prod.outlook.com (2603:10b6:406:ac::12) by BN7PR11MB2627.namprd11.prod.outlook.com (2603:10b6:406:ae::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2921.27; Tue, 21 Apr 2020 08:53:08 +0000 Received: from BN7PR11MB2804.namprd11.prod.outlook.com ([fe80::79e2:ed1f:4d6b:532c]) by BN7PR11MB2804.namprd11.prod.outlook.com ([fe80::79e2:ed1f:4d6b:532c%7]) with mapi id 15.20.2921.030; Tue, 21 Apr 2020 08:53:08 +0000 From: "Zhiguang Liu" To: "devel@edk2.groups.io" , "abner.chang@hpe.com" CC: Gilbert Chen , Leif Lindholm , "Kinney, Michael D" , "Gao, Liming" Subject: Re: [edk2-devel] [PATCH v2 8/9] MdePkg/BaseSynchronizationLib: RISC-V cache related code. Thread-Topic: [edk2-devel] [PATCH v2 8/9] MdePkg/BaseSynchronizationLib: RISC-V cache related code. Thread-Index: AQHWF7dbdQ2ZNe1mqUS+9nRpA/88eqiDRRmQ Date: Tue, 21 Apr 2020 08:53:08 +0000 Message-ID: References: <20200421075317.26008-1-abner.chang@hpe.com> In-Reply-To: <20200421075317.26008-1-abner.chang@hpe.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.2.0.6 dlp-product: dlpe-windows authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiguang.liu@intel.com; x-originating-ip: [192.102.204.36] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 92bcf67c-23f7-4bc0-b19e-08d7e5d169f4 x-ms-traffictypediagnostic: BN7PR11MB2627: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:3383; x-forefront-prvs: 038002787A x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BN7PR11MB2804.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(10019020)(376002)(39860400002)(346002)(396003)(366004)(136003)(26005)(81156014)(52536014)(55016002)(316002)(9686003)(66446008)(8936002)(107886003)(66556008)(2906002)(66476007)(64756008)(66946007)(76116006)(86362001)(33656002)(53546011)(478600001)(5660300002)(4326008)(6506007)(19627235002)(8676002)(966005)(7696005)(186003)(110136005)(54906003)(71200400001);DIR:OUT;SFP:1102; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: YfBVcsHC45wlyVRsGvc9wW4MTxZftsi0njEMcjRWJkZrmYN7RRk563rRW8ENDChH1v2yxMHHYU/mKLZphdUCGR5VXeBRPVbEl7GP5cALK1NmiysS6WH1Sm0HJOBAK5WL3vbGsz/mYdEB7YvI+yvvrcLuFWlfMNXrBCZkG+pkjzrZZ0so8ErDMDxpzWH5uOW3fm4rF9s7HVuzfbknM6xJD/Ut7lOkIIhYTGVVZlKA/pxSVmmrC7ICnxWXT9dUJ2DWfXJoZvzND+q1H5CNERSZhn00Xx/eUqF/pUm0STtSLYVKw8Xe+swNvCBWdg0nAFQTIgp2KXeIyxR9pV6lJ7/0p431RWrEWtBvCfuemDqEKWXCDHoV1VXdaOajzzKpZ8jtO8BpM7UtqdJmajwdKGVso5MLF/6KNGwVyokAD8mbc1kOaS7mJEOj+9rA1P3bid5C6pAB0Dshj+QZ4IXrcbGypZg1BUh18cnb5JptzYOgrIkFN5q/CGG24yesCAoDjQ1U2Y4Gc/ItxHwREKq8QTCjBg== x-ms-exchange-antispam-messagedata: r5jHeYbW28gvgTgclVZK+Wfs9l97eAteZzTofq/OyelmINeujprFpOfnygLQ0r8XBi0+B6HgKzwlWTdnQbJciuhtVnWbtqgQaCs1G2SZ8i8TR/ga3TuyUU/oXn0hEcIjk+/Le6I5vxv1e/ci3TnA9Q== MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 92bcf67c-23f7-4bc0-b19e-08d7e5d169f4 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Apr 2020 08:53:08.2835 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: lw8Tt36Ejf0nKnKv9vJIJgeNCGfDMB4FymWW7sjDKSG5a032yxLUCpjV+64XGhH7TVPHxpaTibDdnsc1stp1KQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR11MB2627 Return-Path: zhiguang.liu@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Zhiguang Liu -----Original Message----- From: devel@edk2.groups.io On Behalf Of Abner Chang Sent: Tuesday, April 21, 2020 3:53 PM To: devel@edk2.groups.io Cc: abner.chang@hpe.com; Gilbert Chen ; Leif Lindholm= ; Kinney, Michael D = ; Gao, Liming Subject: [edk2-devel] [PATCH v2 8/9] MdePkg/BaseSynchronizationLib: RISC-V = cache related code. Support RISC-V cache related functions. Signed-off-by: Abner Chang Co-authored-by: Gilbert Chen Reviewed-by: Leif Lindholm Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- .../BaseSynchronizationLib.inf | 5 ++ .../RiscV64/Synchronization.S | 78 +++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchroni= zation.S diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.i= nf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf index 446bc19b63..83d5b8ed7c 100755 --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf @@ -3,6 +3,7 @@ # # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -78,6 +79,10 @@ AArch64/Synchronization.S | GCC AArch64/Synchronization.asm | MSFT =20 +[Sources.RISCV64] + Synchronization.c + RiscV64/Synchronization.S + [Packages] MdePkg/MdePkg.dec =20 diff --git a/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.= S b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S new file mode 100644 index 0000000000..bac80d6871 --- /dev/null +++ b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S @@ -0,0 +1,78 @@ +//------------------------------------------------------------------------= ------ +// +// RISC-V synchronization functions. +// +// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +//------------------------------------------------------------------------= ------ +#include + +.data + +.text +.align 3 + +.global ASM_PFX(InternalSyncCompareExchange32) +.global ASM_PFX(InternalSyncCompareExchange64) +.global ASM_PFX(InternalSyncIncrement) +.global ASM_PFX(InternalSyncDecrement) + +// +// ompare and xchange a 32-bit value. +// +// @param a0 : Pointer to 32-bit value. +// @param a1 : Compare value. +// @param a2 : Exchange value. +// +ASM_PFX (InternalSyncCompareExchange32): + lr.w a3, (a0) // Load the value from a0 and make + // the reservation of address. + bne a3, a1, exit + sc.w a3, a2, (a0) // Write the value back to the address. + mv a3, a1 +exit: + mv a0, a3 + ret + +.global ASM_PFX(InternalSyncCompareExchange64) + +// +// Compare and xchange a 64-bit value. +// +// @param a0 : Pointer to 64-bit value. +// @param a1 : Compare value. +// @param a2 : Exchange value. +// +ASM_PFX (SyncCompareExchange64): + lr.d a3, (a0) // Load the value from a0 and make + // the reservation of address. + bne a3, a1, exit + sc.d a3, a2, (a0) // Write the value back to the address. + mv a3, a1 +exit2: + mv a0, a3 + ret + +// +// Performs an atomic increment of an 32-bit unsigned integer. +// +// @param a0 : Pointer to 32-bit value. +// +ASM_PFX (InternalSyncIncrement): + li a1, 1 + amoadd.w a2, a1, (a0) + mv a0, a2 + ret + +// +// Performs an atomic decrement of an 32-bit unsigned integer. +// +// @param a0 : Pointer to 32-bit value. +// +ASM_PFX (InternalSyncDecrement): + li a1, -1 + amoadd.w a2, a1, (a0) + mv a0, a2 + ret --=20 2.25.0 -=3D-=3D-=3D-=3D-=3D-=3D Groups.io Links: You receive all messages sent to this group. View/Reply Online (#57720): https://edk2.groups.io/g/devel/message/57720 Mute This Topic: https://groups.io/mt/73168213/1779286 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [zhiguang.liu@intel.com] -=3D-=3D-=3D-=3D-=3D-=3D