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charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Liu, Zhiguang > Sent: Friday, June 4, 2021 5:42 PM > To: devel@edk2.groups.io > Cc: Kinney, Michael D ; Liming Gao > ; Wang, Jian J ; Wu, Hao > A > Subject: [Patch V3 2/9] MdeModulePkg: Add new structure for the PCI Root > Bridge Info Hob >=20 > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Jian J Wang > Cc: Hao A Wu >=20 > Signed-off-by: Zhiguang Liu > --- > MdeModulePkg/Include/UniversalPayload/PciRootBridges.h | 89 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++++ > MdeModulePkg/MdeModulePkg.dec | 6 ++++++ > 2 files changed, 95 insertions(+) >=20 > diff --git a/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h > b/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h > new file mode 100644 > index 0000000000..72e8331ede > --- /dev/null > +++ b/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h > @@ -0,0 +1,89 @@ > +/** @file >=20 > + This file defines the structure for the PCI Root Bridges. >=20 > + >=20 > + Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > + SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > + Could you help to add the specification reference information in the header= file description comment? With this handled: Reviewed-by: Hao A Wu Best Regards, Hao Wu >=20 > +**/ >=20 > + >=20 > +#ifndef __PLD_PCI_ROOT_BRIDGES_H__ >=20 > +#define __PLD_PCI_ROOT_BRIDGES_H__ >=20 > + >=20 > +#include >=20 > + >=20 > +#pragma pack(1) >=20 > + >=20 > +// >=20 > +// (Base > Limit) indicates an aperture is not available. >=20 > +// >=20 > +typedef struct { >=20 > + // >=20 > + // Base and Limit are the device address instead of host address when >=20 > + // Translation is not zero >=20 > + // >=20 > + UINT64 Base; >=20 > + UINT64 Limit; >=20 > + // >=20 > + // According to UEFI 2.7, Device Address =3D Host Address + Translatio= n, >=20 > + // so Translation =3D Device Address - Host Address. >=20 > + // On platforms where Translation is not zero, the subtraction is prob= ably to >=20 > + // be performed with UINT64 wrap-around semantics, for we may translat= e > an >=20 > + // above-4G host address into a below-4G device address for legacy PCI= e > device >=20 > + // compatibility. >=20 > + // >=20 > + // NOTE: The alignment of Translation is required to be larger than an= y BAR >=20 > + // alignment in the same root bridge, so that the same alignment can b= e >=20 > + // applied to both device address and host address, which simplifies t= he >=20 > + // situation and makes the current resource allocation code in generic= PCI >=20 > + // host bridge driver still work. >=20 > + // >=20 > + UINT64 Translation; >=20 > +} PLD_PCI_ROOT_BRIDGE_APERTURE; >=20 > + >=20 > +/// >=20 > +/// Payload PCI Root Bridge Information HOB >=20 > +/// >=20 > +typedef struct { >=20 > + UINT32 Segment; ///< Segment numbe= r. >=20 > + UINT64 Supports; ///< Supported att= ributes. >=20 > + ///< Refer to EFI_= PCI_ATTRIBUTE_xxx used by > GetAttributes() >=20 > + ///< and SetAttrib= utes() in > EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. >=20 > + UINT64 Attributes; ///< Initial attri= butes. >=20 > + ///< Refer to EFI_= PCI_ATTRIBUTE_xxx used by > GetAttributes() >=20 > + ///< and SetAttrib= utes() in > EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. >=20 > + BOOLEAN DmaAbove4G; ///< DMA above 4GB= memory. >=20 > + ///< Set to TRUE w= hen root bridge supports DMA > above 4GB memory. >=20 > + BOOLEAN NoExtendedConfigSpace; ///< When FALSE, t= he root > bridge supports >=20 > + ///< Extended (409= 6-byte) Configuration Space. >=20 > + ///< When TRUE, th= e root bridge supports >=20 > + ///< 256-byte Conf= iguration Space only. >=20 > + UINT64 AllocationAttributes; ///< Allocation at= tributes. >=20 > + ///< Refer to > EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and >=20 > + ///< EFI_PCI_HOST_= BRIDGE_MEM64_DECODE > used by GetAllocAttributes() >=20 > + ///< in > EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL. >=20 > + PLD_PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture = which > can be used by the root bridge. >=20 > + PLD_PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture w= hich can > be used by the root bridge. >=20 > + PLD_PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture > below 4GB which can be used by the root bridge. >=20 > + PLD_PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO > aperture above 4GB which can be used by the root bridge. >=20 > + PLD_PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable = MMIO > aperture below 4GB which can be used by the root bridge. >=20 > + PLD_PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable > MMIO aperture above 4GB which can be used by the root bridge. >=20 > + UINT32 HID; ///< PnP hardware = ID of the root bridge. > This value must match the corresponding >=20 > + ///< _HID in the A= CPI name space. >=20 > + UINT32 UID; ///< Unique ID tha= t is required by ACPI if > two devices have the same _HID. >=20 > + ///< This value mu= st also match the > corresponding _UID/_HID pair in the ACPI name space. >=20 > +} PLD_PCI_ROOT_BRIDGE; >=20 > + >=20 > +typedef struct { >=20 > + PLD_GENERIC_HEADER PldHeader; >=20 > + BOOLEAN ResourceAssigned; >=20 > + UINT8 Count; >=20 > + PLD_PCI_ROOT_BRIDGE RootBridge[0]; >=20 > +} PLD_PCI_ROOT_BRIDGES; >=20 > + >=20 > +#pragma pack() >=20 > + >=20 > +#define PLD_PCI_ROOT_BRIDGES_REVISION 1 >=20 > + >=20 > +extern GUID gPldPciRootBridgeInfoGuid; >=20 > + >=20 > +#endif // __PLD_PCI_ROOT_BRIDGES_H__ >=20 > diff --git a/MdeModulePkg/MdeModulePkg.dec > b/MdeModulePkg/MdeModulePkg.dec > index 8d38383915..671d0f33c8 100644 > --- a/MdeModulePkg/MdeModulePkg.dec > +++ b/MdeModulePkg/MdeModulePkg.dec > @@ -404,6 +404,12 @@ > ## Include/Guid/MigratedFvInfo.h >=20 > gEdkiiMigratedFvInfoGuid =3D { 0xc1ab12f7, 0x74aa, 0x408d, { 0xa2, 0xf= 4, 0xc6, > 0xce, 0xfd, 0x17, 0x98, 0x71 } } >=20 >=20 >=20 > + # >=20 > + # GUID defined in UniversalPayload >=20 > + # >=20 > + ## Include/UniversalPayload/PciRootBridges.h >=20 > + gPldPciRootBridgeInfoGuid =3D { 0xec4ebacb, 0x2638, 0x416e, { 0xbe, 0x= 80, > 0xe5, 0xfa, 0x4b, 0x51, 0x19, 0x01 }} >=20 > + >=20 > [Ppis] >=20 > ## Include/Ppi/AtaController.h >=20 > gPeiAtaControllerPpiGuid =3D { 0xa45e60d1, 0xc719, 0x44aa, { 0xb= 0, 0x7a, > 0xaa, 0x77, 0x7f, 0x85, 0x90, 0x6d }} >=20 > -- > 2.30.0.windows.2