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Yes. Please help to keep my R-b tag. Thanks.

 

Best Regards,

Hao Wu

 

From: Liu, Zhiguang <zhiguang.liu= @intel.com>
Sent: Tuesday, June 15, 2021 5:16 PM
To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@intel.com&g= t;; Wu, Hao A <hao.a.wu@intel.com>
Subject: =BB= =D8=B8=B4: [edk2-devel] [Patch V5 2/9] MdeModulePkg: Add new struct= ure for the PCI Root Bridge Info Hob

 

Hi Hao,

 

For this patch, can I keep your reviewed-by?<= /span>

 

I just added ExceptionList in MdeModulePkg\MdeModulePkg.ci.yaml, to avoid CI failure.

 

Thanks=

Zhiguang<= /span>

=B7=A2=BC=FE=C8=CB: devel@edk2.groups.io <devel@edk2.groups.io> =B4=FA= =B1=ED Zhiguang Liu <zhiguang.liu@intel.com>
=B7= =A2=CB=CD=CA=B1=BC=E4: 2= 021=C4= =EA6=D4=C215=C8=D5 17:12
=CA= =D5=BC=FE=C8=CB: devel@edk2.groups.io <devel@edk2.groups.io>
=B3= =AD=CB=CD: Kinney, Micha= el D <michael.d.kinney@intel= .com>; Liming Gao <ga= oliming@byosoft.com.cn>; Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>
=D6= =F7=CC=E2: [edk2-devel] [Patch V5 2/9] MdeModulePkg: Add new structure for the PCI Root Bridge Inf= o Hob

 

V5:
Add ExceptionList in MdeModulePkg\MdeModulePkg.ci.yaml, to avoid open CI issue, because UID and HID are terms which are already used in current
source code.

Cc: Michael D Kinney <mich= ael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@by= osoft.com.cn>
Cc: Jian J Wang <jian.j.wang@in= tel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@in= tel.com>
Signed-off-by: Zhiguang Liu <z= higuang.liu@intel.com>
---
 MdeModulePkg/Include/UniversalPayload/PciRootBridges.h | 91 +++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++
 MdeModulePkg/MdeModulePkg.ci.yaml      =             &nb= sp;   |  2 ++
 MdeModulePkg/MdeModulePkg.dec      &nbs= p;            &= nbsp;      |  6 ++++++
 3 files changed, 99 insertions(+)

diff --git a/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h b/MdeMo= dulePkg/Include/UniversalPayload/PciRootBridges.h
new file mode 100644
index 0000000000..3a7aae82d4
--- /dev/null
+++ b/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h
@@ -0,0 +1,91 @@
+/** @file

+  This file defines the structure for the PCI Root Bridges.

+

+  Copyright (c) 2021, Intel Corporation. All rights reserved.<BR&g= t;

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+  @par Revision Reference:

+    - Universal Payload Specification 0.75 (https://universalpayload.git= hub.io/documentation/)

+**/

+

+#ifndef UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_

+#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_

+

+#include <UniversalPayload/UniversalPayload.h>

+

+#pragma pack(1)

+

+//

+// (Base > Limit) indicates an aperture is not available.

+//

+typedef struct {

+  //

+  // Base and Limit are the device address instead of host address wh= en

+  // Translation is not zero

+  //

+  UINT64 Base;

+  UINT64 Limit;

+  //

+  // According to UEFI 2.7, Device Address =3D Host Address + Transla= tion,

+  // so Translation =3D Device Address - Host Address.

+  // On platforms where Translation is not zero, the subtraction is p= robably to

+  // be performed with UINT64 wrap-around semantics, for we may trans= late an

+  // above-4G host address into a below-4G device address for legacy = PCIe device

+  // compatibility.

+  //

+  // NOTE: The alignment of Translation is required to be larger than= any BAR

+  // alignment in the same root bridge, so that the same alignment ca= n be

+  // applied to both device address and host address, which simplifie= s the

+  // situation and makes the current resource allocation code in gene= ric PCI

+  // host bridge driver still work.

+  //

+  UINT64 Translation;

+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE;

+

+///

+/// Payload PCI Root Bridge Information HOB

+///

+typedef struct {

+  UINT32          &= nbsp;           &nbs= p;            &= nbsp; Segment;          &= nbsp;    ///< Segment number.

+  UINT64          &= nbsp;           &nbs= p;            &= nbsp; Supports;          =     ///< Supported attributes.

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by= GetAttributes()

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< and SetAttributes() in EFI_PCI_ROOT_BR= IDGE_IO_PROTOCOL.

+  UINT64          &= nbsp;           &nbs= p;            &= nbsp; Attributes;         &nbs= p;  ///< Initial attributes.

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by= GetAttributes()

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< and SetAttributes() in EFI_PCI_ROOT_BR= IDGE_IO_PROTOCOL.

+  BOOLEAN          =             &nb= sp;            = DmaAbove4G;          &nb= sp; ///< DMA above 4GB memory.

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< Set to TRUE when root bridge supports = DMA above 4GB memory.

+  BOOLEAN          =             &nb= sp;            = NoExtendedConfigSpace; ///< When FALSE, the root bridge supports

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< Extended (4096-byte) Configuration Spa= ce.

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< When TRUE, the root bridge supports
+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< 256-byte Configuration Space only.

+  UINT64          &= nbsp;           &nbs= p;            &= nbsp; AllocationAttributes;  ///< Allocation attributes.

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_M= EM_PMEM and

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used = by GetAllocAttributes()

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCA= TION_PROTOCOL.

+  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Bus;   &n= bsp;            = ;   ///< Bus aperture which can be used by the root bridge.
+  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Io;   &nb= sp;            =     ///< IO aperture which can be used by the root bridge= .

+  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Mem;   &n= bsp;            = ;   ///< MMIO aperture below 4GB which can be used by the root= bridge.

+  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE MemAbove4G;  &= nbsp;         ///< MMIO aperture= above 4GB which can be used by the root bridge.

+  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMem;   &= nbsp;           &nbs= p;  ///< Prefetchable MMIO aperture below 4GB which can be used by = the root bridge.

+  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;  =          ///< Prefetchable MMIO = aperture above 4GB which can be used by the root bridge.

+  UINT32          &= nbsp;           &nbs= p;            &= nbsp; HID;           = ;        ///< PnP hardware ID of the = root bridge. This value must match the corresponding

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< _HID in the ACPI name space.

+  UINT32          &= nbsp;           &nbs= p;            &= nbsp; UID;           = ;        ///< Unique ID that is requi= red by ACPI if two devices have the same _HID.

+            &n= bsp;            = ;            &n= bsp;            = ;            &n= bsp;     ///< This value must also match the corresp= onding _UID/_HID pair in the ACPI name space.

+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE;

+

+typedef struct {

+  UNIVERSAL_PAYLOAD_GENERIC_HEADER   Header;

+  BOOLEAN          =             &nb= sp;     ResourceAssigned;

+  UINT8          &n= bsp;            = ;       Count;

+  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE  RootBridge[0];

+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES;

+

+#pragma pack()

+

+#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION 1

+

+extern GUID gUniversalPayloadPciRootBridgeInfoGuid;

+

+#endif // UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_

diff --git a/MdeModulePkg/MdeModulePkg.ci.yaml b/MdeModulePkg/MdeModulePkg.= ci.yaml
index 45783f12c1..4c71468bd3 100644
--- a/MdeModulePkg/MdeModulePkg.ci.yaml
+++ b/MdeModulePkg/MdeModulePkg.ci.yaml
@@ -16,6 +16,8 @@
         ##    = "<ErrorID>", "<KeyWord>"

         ## ]

         "ExceptionList":= [

+            "8= 005", "UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE.UID",

+            "8= 005", "UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE.HID",

         ],

         ## Both file path and dire= ctory path are accepted.

         "IgnoreFiles": [=

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec<= br> index 8d38383915..5cee4e159a 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -404,6 +404,12 @@
   ## Include/Guid/MigratedFvInfo.h

   gEdkiiMigratedFvInfoGuid =3D { 0xc1ab12f7, 0x74aa, 0x408d, { 0= xa2, 0xf4, 0xc6, 0xce, 0xfd, 0x17, 0x98, 0x71 } }

 

+  #

+  # GUID defined in UniversalPayload

+  #

+  ## Include/UniversalPayload/PciRootBridges.h

+  gUniversalPayloadPciRootBridgeInfoGuid =3D { 0xec4ebacb, 0x2638, 0x= 416e, { 0xbe, 0x80, 0xe5, 0xfa, 0x4b, 0x51, 0x19, 0x01 }}

+

 [Ppis]

   ## Include/Ppi/AtaController.h

   gPeiAtaControllerPpiGuid       = =3D { 0xa45e60d1, 0xc719, 0x44aa, { 0xb0, 0x7a, 0xaa, 0x77, 0x7f, 0x85, 0x9= 0, 0x6d }}

--
2.30.0.windows.2



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