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b=qVKT8+3J7wQZw1Yza1QBdrlN2Yfn4vb2J5h/KMPXObpUjjkCOtzL1m3YNbI+M7cal PV3pr1j4WWif1G5DI7ye7RU2ylaNPbUq2QQ7v810fhqmh0GUahoFxgAv01FZUaU31j QBUmFeg2oEG+jb9qkWLC+PIIoTdbeUVEl3yvRBQQ8JLLZPNYmRQeySC9QX793sNcr2 Zmz5mwgJmD87GTvOzNTKh8lTNg+6qaLDDWTrsmwpdBm1BpS2hN8NQsSF8apRl7b6u9 OtujU4ieey3Auo1sJ4cPCfM8QOuX2TwiowdbRgOMwLE+YQctIryyKCkbfohGbz1f59 Ar11eKC682BVQ== Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hello Ard Biesheuvel, Would you please review this change? Thank you, Irene -----Original Message----- From: Irene Park =20 Sent: Friday, June 5, 2020 11:23 PM To: devel@edk2.groups.io Cc: Irene Park Subject: [PATCH] ArmPlatformPkg/PL011UartLib: Add PCD for FIFO depth From: Irene Park PL011UartLib determines its FIFO depth based on the PID2 value but the regi= ster PID2 is not mandatory in the SBSA spec. This change adds a new 32bit PCD reference to define a FIFO depth and make = PL011UartLib available for the custom UART which is compliant to the SBSA s= pec but doesn't support the optional register of PID2. * Available values for PL011UartFifoDepth: 0, 16, 32 Note that a FIFO depth will be determined based on PID2 when the PCD refere= nce is set to 0. Signed-off-by: Irene Park --- ArmPlatformPkg/ArmPlatformPkg.dec | 2 ++ ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c | 4 ++++ ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf | 1 + 3 files changed, 7 insertions(+) diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatform= Pkg.dec index 696d636..b4b950f 100644 --- a/ArmPlatformPkg/ArmPlatformPkg.dec +++ b/ArmPlatformPkg/ArmPlatformPkg.dec @@ -72,6 +72,8 @@ gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x000000= 2F gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E + ## FIFO Depth in 0/16/32 (0 to determine FIFO depth based on PID2) =20 + gArmPlatformTokenSpaceGuid.PL011UartFifoDepth|0|UINT32|0x0000003F =20 ## PL011 Serial Debug UART gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x= 00000030 diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c b/ArmPlatfo= rmPkg/Library/PL011UartLib/PL011UartLib.c index 801990d..1aa6830 100644 --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c @@ -79,9 +79,13 @@ PL011UartInitializePort ( UINT32 Fractional; UINT32 HardwareFifoDepth; =20 + HardwareFifoDepth =3D FixedPcdGet8 (PL011UartFifoDepth); #if=20 +FixedPcdGet8 (PL011UartFifoDepth) =3D=3D 0 HardwareFifoDepth =3D (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPI= D2)) \ > PL011_VER_R1P4) \ ? 32 : 16 ; +#endif + // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can ac= cept // 1 char buffer as the minimum FIFO size. Because everything can be rou= nded // down, there is no maximum FIFO size. diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf b/ArmPlat= formPkg/Library/PL011UartLib/PL011UartLib.inf index d99e89f..3e5efc7 100644 --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf @@ -35,3 +35,4 @@ gArmPlatformTokenSpaceGuid.PL011UartInteger gArmPlatformTokenSpaceGuid.PL011UartFractional gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant + gArmPlatformTokenSpaceGuid.PL011UartFifoDepth -- 2.7.4