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From: "Irene Park" <ipark@nvidia.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	"ard.biesheuvel@linaro.org" <ard.biesheuvel@linaro.org>
Subject: Re: [PATCH] ArmPlatformPkg/PL011UartLib: Add PCD for FIFO depth
Date: Mon, 8 Jun 2020 06:06:40 +0000	[thread overview]
Message-ID: <BN8PR12MB3458EE29F2AC5298375ACCFDC9850@BN8PR12MB3458.namprd12.prod.outlook.com> (raw)
In-Reply-To: <BN8PR12MB345844F89A1E113B86B85239C9870@BN8PR12MB3458.namprd12.prod.outlook.com>

Hello Ard Biesheuvel,
Would you please review this change?
Thank you,
Irene

-----Original Message-----
From: Irene Park <ipark@nvidia.com>
Sent: Friday, June 5, 2020 11:23 PM
To: devel@edk2.groups.io
Cc: Irene Park <ipark@nvidia.com>
Subject: [PATCH] ArmPlatformPkg/PL011UartLib: Add PCD for FIFO depth

From: Irene Park <ipark@nvidia.com>

PL011UartLib determines its FIFO depth based on the PID2 value but the register PID2 is not mandatory in the SBSA spec.
This change adds a new 32bit PCD reference to define a FIFO depth and make PL011UartLib available for the custom UART which is compliant to the SBSA spec but doesn't support the optional register of PID2.

* Available values for PL011UartFifoDepth: 0, 16, 32

Note that a FIFO depth will be determined based on PID2 when the PCD reference is set to 0.

Signed-off-by: Irene Park <ipark@nvidia.com>
---
 ArmPlatformPkg/ArmPlatformPkg.dec                    | 2 ++
 ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c   | 4 ++++
 ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf | 1 +
 3 files changed, 7 insertions(+)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec
index 696d636..b4b950f 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -72,6 +72,8 @@
   gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F
   gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E
+  ## FIFO Depth in 0/16/32 (0 to determine FIFO depth based on PID2) 
+ gArmPlatformTokenSpaceGuid.PL011UartFifoDepth|0|UINT32|0x0000003F
 
   ## PL011 Serial Debug UART
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030
diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c
index 801990d..1aa6830 100644
--- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c
+++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c
@@ -79,9 +79,13 @@ PL011UartInitializePort (
   UINT32      Fractional;
   UINT32      HardwareFifoDepth;
 
+  HardwareFifoDepth = FixedPcdGet8 (PL011UartFifoDepth); #if
+FixedPcdGet8 (PL011UartFifoDepth) == 0
   HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) \
                        > PL011_VER_R1P4) \
                       ? 32 : 16 ;
+#endif
+
   // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept
   // 1 char buffer as the minimum FIFO size. Because everything can be rounded
   // down, there is no maximum FIFO size.
diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
index d99e89f..3e5efc7 100644
--- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
@@ -35,3 +35,4 @@
   gArmPlatformTokenSpaceGuid.PL011UartInteger
   gArmPlatformTokenSpaceGuid.PL011UartFractional
   gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant
+  gArmPlatformTokenSpaceGuid.PL011UartFifoDepth
--
2.7.4


  reply	other threads:[~2020-06-08  6:06 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-06  3:23 [PATCH] ArmPlatformPkg/PL011UartLib: Add PCD for FIFO depth Irene Park
2020-06-06  3:24 ` Irene Park
2020-06-08  6:06   ` Irene Park [this message]
2020-06-08  8:29 ` [edk2-devel] " Ard Biesheuvel
2020-06-08 14:47   ` Irene Park
2020-06-08 16:44     ` Ard Biesheuvel

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