From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: "Duggapu, Chinni B" <chinni.b.duggapu@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"Zeng, Star" <star.zeng@intel.com>,
"S, Ashraf Ali" <ashraf.ali.s@intel.com>
Subject: Re: [PATCH v5 2/2] IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call must follow X64 Calling Convention
Date: Wed, 18 May 2022 01:41:14 +0000 [thread overview]
Message-ID: <BN9PR11MB54831E1923CC5722E93CD577E6D19@BN9PR11MB5483.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220517084401.1805-3-chinni.b.duggapu@intel.com>
Thanks Chinni!
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Duggapu, Chinni B <chinni.b.duggapu@intel.com>
> Sent: Tuesday, May 17, 2022 4:44 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>; S,
> Ashraf Ali <ashraf.ali.s@intel.com>
> Subject: [PATCH v5 2/2] IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call
> must follow X64 Calling Convention
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3926
> Pass Input parameters using RCX.
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
> Signed-off-by: cbduggap <chinni.b.duggapu@intel.com>
> ---
> .../SecFspWrapperPlatformSecLibSample/X64/SecEntry.nasm | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
> /SecEntry.nasm
> b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
> /SecEntry.nasm
> index dbbf63336e..065d80d0e2 100644
> ---
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
> /SecEntry.nasm
> +++
> b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
> /SecEntry.nasm
> @@ -130,6 +130,9 @@ FspHeaderFound:
> mov eax, dword [edi + FSP_HEADER_IMAGEBASE_OFFSET]
>
> add eax, dword [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
>
>
>
> + ; Pass Fsp T Udp pointer as Input parameter
>
> + mov rcx, ASM_PFX(FsptUpdDataPtr)
>
> +
>
> ; Setup the hardcode stack
>
> mov rsp, TempRamInitStack
>
>
>
> @@ -167,5 +170,4 @@ FspApiFailed:
> align 10h
>
> TempRamInitStack:
>
> DQ TempRamInitDone
>
> - DQ ASM_PFX(FsptUpdDataPtr) ; TempRamInitParams
>
>
>
> --
> 2.36.0.windows.1
next prev parent reply other threads:[~2022-05-18 1:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-17 8:43 [PATCH v5 0/2] FSP_TEMP_RAM_INIT call must follow X64 Calling Convention cbduggap
2022-05-17 8:44 ` [PATCH v5 1/2] IntelFsp2Pkg: " cbduggap
2022-05-18 1:40 ` Chiu, Chasel
2022-05-17 8:44 ` [PATCH v5 2/2] IntelFsp2WrapperPkg: " cbduggap
2022-05-18 1:41 ` Chiu, Chasel [this message]
2022-05-18 2:41 ` [edk2-devel] " Kuo, Ted
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