From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>,
Benjamin Doron <benjamin.doron00@gmail.com>
Subject: Re: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS
Date: Wed, 11 Aug 2021 01:56:12 +0000 [thread overview]
Message-ID: <BN9PR11MB548330B36F036BCF42D039A9E6F89@BN9PR11MB5483.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20210810225309.27112-1-nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
> Sent: Wednesday, August 11, 2021 6:53 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Michael Kubacki
> <Michael.Kubacki@microsoft.com>; Benjamin Doron
> <benjamin.doron00@gmail.com>
> Subject: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO
> Base/Length to SA GNVS
>
> The SA GNVS Area contains fields for the MMIO region base address and
> length. This implements code to populate those fields. The MMIO
> Base/Length are used by ASL at runtime and must be populated for normal
> system operation.
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>
> Cc: Benjamin Doron <benjamin.doron00@gmail.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
> .../Acpi/BoardAcpiDxe/AcpiGnvsInit.c | 57 ++++++++++++++++++-
> .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf | 12 +++-
> 2 files changed, 63 insertions(+), 6 deletions(-)
>
> diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.
> c
> index 0d9d217e38..b09b92f2e6 100644
> ---
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
> +++
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit
> +++ .c
> @@ -1,7 +1,7 @@
> /** @file
> Acpi Gnvs Init Library.
>
> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -11,11 +11,51 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #include <Library/PciLib.h> #include <Library/DebugLib.h> #include
> <Library/BaseMemoryLib.h>
> +#include <Library/UefiLib.h>
> #include <Library/UefiBootServicesTableLib.h>
>
> #include <PchAccess.h>
> #include <Protocol/GlobalNvsArea.h>
> #include <Protocol/MpService.h>
> +#include <Protocol/SaGlobalNvsArea.h>
> +
> +/**
> + A protocol callback which updates MMIO Base and Length in SA GNVS
> +area
> +
> + @param[in] Event - The triggered event.
> + @param[in] Context - Context for this event.
> +
> +**/
> +VOID
> +UpdateSaGnvsForMmioResourceBaseLength (
> + IN EFI_EVENT Event,
> + IN VOID *Context
> + )
> +{
> + EFI_STATUS Status;
> + SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL
> *SaGlobalNvsAreaProtocol;
> +
> + Status = gBS->LocateProtocol (&gSaGlobalNvsAreaProtocolGuid, NULL,
> + (VOID **) &SaGlobalNvsAreaProtocol); if (Status != EFI_SUCCESS) {
> + return;
> + }
> + gBS->CloseEvent (Event);
> +
> + //
> + // Configure MMIO Base/Length. This logic is only valid for platforms that
> use PciHostBridgeLibSimple.
> + //
> + DEBUG ((DEBUG_INFO, "[BoardAcpiDxe] Update SA GNVS Area.\n"));
> + SaGlobalNvsAreaProtocol->Area->Mmio32Base = PcdGet32
> +(PcdPciReservedMemBase);
> + if (PcdGet32 (PcdPciReservedMemLimit) != 0) {
> + SaGlobalNvsAreaProtocol->Area->Mmio32Length = PcdGet32
> +(PcdPciReservedMemLimit) - PcdGet32 (PcdPciReservedMemBase) + 1;
> + } else {
> + SaGlobalNvsAreaProtocol->Area->Mmio32Length = ((UINT32) PcdGet64
> +(PcdPciExpressBaseAddress)) - PcdGet32 (PcdPciReservedMemBase);
> + }
> + if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64
> (PcdPciReservedMemAbove4GBBase)) {
> + SaGlobalNvsAreaProtocol->Area->Mmio64Base = PcdGet64
> (PcdPciReservedMemAbove4GBBase);
> + SaGlobalNvsAreaProtocol->Area->Mmio64Length = PcdGet64
> +(PcdPciReservedMemAbove4GBLimit) - PcdGet64
> +(PcdPciReservedMemAbove4GBBase) + 1;
> + }
> +}
>
> /**
> @brief
> @@ -39,6 +79,7 @@ AcpiGnvsInit (
> EFI_MP_SERVICES_PROTOCOL *MpService;
> UINTN NumberOfCPUs;
> UINTN NumberOfEnabledCPUs;
> + VOID *SaGlobalNvsRegistration;
>
> Pages = EFI_SIZE_TO_PAGES (sizeof (EFI_GLOBAL_NVS_AREA));
> Address = 0xffffffff; // allocate address below 4G.
> @@ -53,7 +94,7 @@ AcpiGnvsInit (
> if (EFI_ERROR(Status)) {
> return Status;
> }
> -
> +
> //
> // Locate the MP services protocol
> // Find the MP Protocol. This is an MP platform, so MP protocol must be
> there.
> @@ -90,6 +131,16 @@ AcpiGnvsInit (
> GNVS->Area->PL1LimitCS = 0;
> GNVS->Area->PL1LimitCSValue = 4500;
>
> + //
> + // Update SA GNVS with MMIO Base/Length //
> + EfiCreateProtocolNotifyEvent (
> + &gSaGlobalNvsAreaProtocolGuid,
> + TPL_CALLBACK,
> + UpdateSaGnvsForMmioResourceBaseLength,
> + NULL,
> + &SaGlobalNvsRegistration
> + );
> +
> return EFI_SUCCESS;
> }
> -
> diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> .inf
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> .inf
> index 7d2e105e54..5d3d4c3a2b 100644
> ---
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> .inf
> +++
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> +++ .inf
> @@ -1,7 +1,7 @@
> ### @file
> # Component information file for AcpiPlatform module # -# Copyright (c)
> 2017 - 2019, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2017 - 2021, Intel Corporation. All rights
> +reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -38,6 +38,7 @@
> PcdLib
> UefiBootServicesTableLib
> UefiRuntimeServicesTableLib
> + UefiLib
> BaseMemoryLib
> HobLib
> AslUpdateLib
> @@ -48,8 +49,15 @@
> gEfiFirmwareVolume2ProtocolGuid ## CONSUMES
> gEfiMpServiceProtocolGuid ## CONSUMES
> gEfiGlobalNvsAreaProtocolGuid
> + gSaGlobalNvsAreaProtocolGuid ## CONSUMES
>
> [Pcd]
> + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
> + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase
> + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit
> + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase
> + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit
> +
> gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiGnvsAddress
>
> gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiSleepState
> @@ -65,5 +73,3 @@
> gEfiPciRootBridgeIoProtocolGuid AND
> gEfiVariableArchProtocolGuid AND
> gEfiVariableWriteArchProtocolGuid
> -
> -
> --
> 2.27.0.windows.1
next prev parent reply other threads:[~2021-08-11 1:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-10 22:53 [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS Nate DeSimone
2021-08-11 1:56 ` Chiu, Chasel [this message]
[not found] ` <169A1DCEF9C635BF.17558@groups.io>
2021-08-11 3:24 ` [edk2-devel] " Chiu, Chasel
2021-08-11 3:48 ` Nate DeSimone
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